參數(shù)資料
型號: MT48LC32M8A2
廠商: Micron Technology, Inc.
英文描述: SYNCHRONOUS DRAM
中文描述: 同步DRAM
文件頁數(shù): 28/62頁
文件大?。?/td> 1517K
代理商: MT48LC32M8A2
28
256Mb: x4, x8, x16 SDRAM
256MSDRAM_E.p65
Rev. E; Pub. 3/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
256Mb: x4, x8, x16
SDRAM
D
IN
COMMAND
ADDRESS
WRITE
COL
n
D
IN
n
NOP
NOP
CLK
T2
T1
T4
T3
T5
T0
CKE
INTERNAL
CLOCK
NOP
D
IN
n
+ 1
D
IN
n
+ 2
NOTE:
For this example, burst length = 4 or greater, and DM
is LOW.
Figure 22
Clock Suspend During WRITE Burst
DON
T CARE
CLK
DQ
D
OUT
n
T2
T1
T4
T3
T6
T5
T0
COMMAND
ADDRESS
READ
NOP
NOP
NOP
BANK,
COL
n
NOP
D
OUT
n
+ 1
D
OUT
n
+ 2
D
OUT
n
+ 3
NOTE:
For this example, CAS latency = 2, burst length = 4 or greater, and
DQM is LOW.
CKE
INTERNAL
CLOCK
NOP
Figure 23
Clock Suspend During READ Burst
CLOCK SUSPEND
The clock suspend mode occurs when a column ac-
cess/burst is in progress and CKE is registered LOW. In
the clock suspend mode, the internal clock is deacti-
vated, “freezing” the synchronous logic.
For each positive clock edge on which CKE is
sampled LOW, the next internal positive clock edge is
suspended. Any command or data present on the in-
put pins at the time of a suspended internal clock edge
is ignored; any data present on the DQ pins remains
driven; and burst counters are not incremented, as
long as the clock is suspended. (See examples in Fig-
ures 22 and 23.)
Clock suspend mode is exited by registering CKE
HIGH; the internal clock and related operation will re-
sume on the subsequent positive clock edge.
BURST READ/SINGLE WRITE
The burst read/single write mode is entered by pro-
gramming the write burst mode bit (M9) in the mode
register to a logic 1. In this mode, all WRITE commands
result in the access of a single column location (burst of
one), regardless of the programmed burst length. READ
commands access columns according to the pro-
grammed burst length and sequence, just as in the
normal mode of operation (M9 = 0).
相關(guān)PDF資料
PDF描述
MT48LC16M16A2 SYNCHRONOUS DRAM
MT48LC64M4A2 SYNCHRONOUS DRAM
MT48LC4M32B2 SYNCHRONOUS DRAM
MT48LC4M32LFFC SYNCHRONOUS DRAM
MT48LC64M8A2 SYNCHRONOUS DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT48LC32M8A2-75 制造商:Micron Technology Inc 功能描述: