參數(shù)資料
型號: MT47H64M16HR-3IT
元件分類: DRAM
英文描述: 64M X 16 DDR DRAM, 0.4 ns, PBGA84
封裝: 8 X 12.50 MM, ROHS COMPLIANT, FBGA-84
文件頁數(shù): 110/129頁
文件大小: 9252K
代理商: MT47H64M16HR-3IT
Extended Mode Register 3 (EMR3)
The extended mode register 3 (EMR3) controls functions beyond those controlled by
the mode register. Currently all bits in EMR3 are reserved, as shown in Figure 41. The
EMR3 is programmed via the LM command and will retain the stored information until
it is programmed again or until the device loses power. Reprogramming the EMR will
not alter the contents of the memory array, provided it is performed correctly.
EMR3 must be loaded when all banks are idle and no bursts are in progress, and the
controller must wait the specified time tMRD before initiating any subsequent opera-
tion. Violating either of these requirements could result in an unspecified operation.
Figure 41: EMR3 Definition
E14
0
1
0
1
Mode Register Set
Mode register (MR)
Extended mode register (EMR)
Extended mode register (EMR2)
Extended mode register (EMR3)
E15
0
0
1
A9
A7 A6 A5 A4 A3
A8
A2 A1 A0
Extended mode
register (Ex)
Address bus
9
7
6
5
4
3
8
2
1
0
A10
A12 A11
BA0
BA1
10
11
12
n
0
14
15
An2
MRS
0
BA21
16
0
Notes: 1. E16 (BA2) is only applicable for densities
≥1Gb, is reserved for future use, and must be
programmed to “0.”
2. Mode bits (En) with corresponding address balls (An) greater than E12 (A12) are re-
served for future use and must be programmed to “0.”
1Gb: x4, x8, x16 1.55V DDR2 SDRAM
Extended Mode Register 3 (EMR3)
PDF: 09005aef82b91d01
1GbDDR2_1_55V.PDF Rev. A 5/09 EN
81
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT47H64M16HR-3L 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM