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| 型號(hào)： | MPC823UM_REV1_16-CPM7 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 10 AMP SUBMINIATURE POWER RELAY |
| 中文描述： | 通信處理器模塊 |
| 文件頁(yè)數(shù)： | 73/74頁(yè) |
| 文件大?。?/td> | 234K |
| 代理商： | MPC823UM_REV1_16-CPM7 |
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Communication Processor Module
MOTOROLA
MPC823 REFERENCE MANUAL
16-451
S
C
1
P
9. Initialize the TX buffer descriptor and assume the TX data buffer is at 0x00002000 in
main memory and contains five 8-bit characters. Write 0xB800 to TX_BD_Status,
0x0005 to TX_BD_Length, and 0x00002000 to TX_BD_Pointer.
10.Write 0xFF to the SPIE register to clear any previous events.
11.Write 0x37 to the SPIM register to enable all possible serial peripheral interface
interrupts.
12.Write 0x00000020 to the CIMR to allow the serial peripheral interface to generate a
system interrupt. The CICR must also be initialized.
13.Write 0x0370 to the SPMODE register to enable normal operation (not loopback),
master mode, serial peripheral interface enabled, 8-bit characters, and the fastest
speed possible.
14.Set the STR bit in the SPCOM register to start the transfer.
16.12.6 SPI Slave Programming Example
The following is an example initialization sequence to follow when the serial peripheral
interface is in slave mode. It is very similar to the master example, except that the SPISEL
pin is used instead of a general-purpose I/O pin.
1. Configure the port B pins to enable the SPIMOSI, SPIMISO, SPISEL, and SPICLK
pins. Write PBPAR bits 31, 30, 29, and 28 with ones and the PBODR bits 31, 30, 29,
and 28 with zeros. Write PBDIR bits 30, 29, and 28 with ones and bit 31 with zero.
2. Write RBASE and TBASE in the SPI parameter RAM to point to the RX and TX buffer
descriptor in the dual-port RAM. Assuming one RX buffer descriptor at the beginning
of the dual-port RAM and one TX buffer descriptor following that RX buffer descriptor,
write RBASE with 0x2000 and TBASE with 0x2008.
3. Write 0x18 to RFCR and TFCR for normal operation.
4. Program the CPM command register (CPCR) to execute the
INIT RX AND TX
PARAMS
command. Write 0x0051 to the CPCR.
5. Write 0x0001 to the SDCR to initialize the SDMA configuration register.
6. Write MRBLR with the maximum number of bytes per receive buffer. Assume 16
bytes, so MRBLR = 0x0010.
7. Initialize the RX buffer descriptor and assume the RX data buffer is at 0x00001000 in
main memory. Write 0xB000 to RX_BD_Status, 0x0000 to RX_BD_Length (optional),
and 0x00001000 to RX_BD_Pointer.
8. Initialize the TX buffer descriptor and assume the TX data buffer is at 0x00002000 in
main memory and contains five 8-bit characters. Write 0xB800 to TX_BD_Status,
0x0005 to TX_BD_Length, and 0x00002000 to TX_BD_Pointer.
Note:
After 5 bytes are transmitted, the TX buffer descriptor is closed. Additionally, the
receive buffer is closed after 5 bytes are received because the L bit of the TX
buffer descriptor is set.
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