參數(shù)資料
型號： MPC823UM_REV1_16-CPM7
廠商： Motorola, Inc.
英文描述： 10 AMP SUBMINIATURE POWER RELAY
中文描述： 通信處理器模塊
文件頁數(shù)： 30/74頁
文件大小： 234K
代理商： MPC823UM_REV1_16-CPM7
Communication Processor Module
16-408
MPC823 REFERENCE MANUAL
MOTOROLA
S
C
1
P
16.11.7.4 USING THE SMSYNx PIN FOR SYNCHRONIZATION.
The SMSYNx pin offers
a method to externally synchronize a SMCx Transparent channel. This method differs
somewhat from the synchronization options available in the serial communication
controllers and must be studied carefully. See Figure 16-118 for an example.
Once the REN bit is set in the SMCMR, the first rising edge of the SMCLK signal that finds
the SMSYNx pin low causes the SMCx receiver to achieve synchronization. Data starts
being received or latched on the same rising edge of SMCLK that latched SMSYNx. This is
the first bit of data received. The receiver never loses synchronization again, regardless of
the state of SMSYNx, until you clear the REN bit.
Once the TEN bit is set in the SMCMR, the first rising edge of the SMCLK signal that finds
the SMSYNx pin low causes the SMCx transmitter to achieve synchronization. The SMCx
transmitter begins transmitting ones asynchronously from the falling edge of SMSYNx. After
one character of ones is transmitted, if the transmit FIFO is loaded (the transmit buffer
descriptor is ready with data), data starts being transmitted on the next falling edge of
SMCLK after some multiple of all-ones (preamble) characters are transmitted. If the transmit
FIFO is loaded at some later time, the data starts transmitting after some multiple number
of all-ones characters is transmitted.
The transmitter never loses synchronization again, regardless of the state of SMSYNx, until
you clear the TEN bit or issue the
ENTER HUNT MODE
command.
Note:
Regardless of whether the transmitter or receiver uses the SMSYNx
signal, it
must make glitch-free transitions from high to low or low to high. Glitches on
SMSYNx can cause a serial management controller to behave erratically.
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