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參數(shù)資料
| 型號： | MK2049-34SAITR |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 148K |
| 代理商： | MK2049-34SAITR |
3.3 Volt Communications Clock VCXO PLL
MDS 2049-34A B
3
Revision 060105
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
MK2049-34A
Output Decoding Table - External Mode (MHz)
Output Decoding Table - Loop Timing Mode (MHz)
Output Decoding Table - Buffer Mode (MHz)
0 = connect directly to ground, 1 = connect directly to VDD
Crystal is connected to pins 2 and 3; clock input is applied to pin 13.
Operating Modes
The MK2049-34A has three operating modes: External, Loop Timing, and Buffer. Although each mode uses an
input clock to generate various output clocks, there are important differences in their input and crystal
requirements.
External Mode
The MK2049-34 accepts an external 8 kHz clock and will produce a number of common communication clock
frequencies. The 8 kHz input clock does not need to have a 50% duty cycle; a “high” or “on” pulse as narrow as 10
ns is acceptable. In the MK2049-34, the rising edges of CLK and CLK/2 are both aligned with the rising edge of the
8 kHz ICLK; refer to Figure 1 on page 4 for more details.
Loop Timing Mode
This mode can be used to remove the jitter from standard high-frequency communication clocks. For T1 and E1
inputs, the CLK/2 output will be the same as the input frequency, with CLK at twice the input frequency.
ICLK
FS3
FS2
FS1
FS0
CLK/2
CLK
8k
Crystal
Used (MHz)
N
8 kHz
0000
1.544
3.088
8 kHz
12.352
1544
8 kHz
0001
2.048
4.096
8 kHz
12.288
1536
8 kHz
0010
22.368
44.736
8 kHz
11.184
1398
8 kHz
0011
17.184
34.368
8 kHz
11.456
1432
8 kHz
0100
19.44
38.88
8 kHz
9.72
1215
8 kHz
0101
16.384
32.768
8 kHz
8.192
1024
8 kHz
0110
17.664
35.328
8 kHz
17.664
2208
8 kHz
0111
18.688
37.376
8 kHz
9.344
1168
8 kHz
1010
7.68
15.36
8 kHz
15.36
1920
8 kHz
1011
10.752
21.504
8 kHz
10.752
1344
8 kHz
1100
10.24
20.48
8 kHz
10.24
1280
8 kHz
1101
38.88
77.76
8 kHz
9.72
1215
ICLK
FS3
FS2
FS1
FS0
CLK/2
CLK
8k
Crystal
N
1.544
1000
1.544
3.088
N/A
12.352
24
2.048
1001
2.048
4.096
N/A
12.288
18
ICLK
FS3
FS2
FS1
FS0
CLK/2
CLK
8k
Crystal
N
19 - 36
1110
ICLK/2
ICLK
N/A
ICLK/2
3
10 - 18
1111
2*ICLK
4*ICLK
N/A
ICLK
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK2049-34SAILFTR | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-34SAILF | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-36SILFTR | 155.52 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-36SI | 155.52 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2059-01SILFTR | 25.92 MHz, OTHER CLOCK GENERATOR, PDSO20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2049-34SI | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-34SITR | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-35 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-35SI | 制造商:Integrated Device Technology Inc 功能描述:49.152 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-35SITR | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL |
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