參數(shù)資料
型號(hào): MFRC53101T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 reader IC
封裝: MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<
文件頁(yè)數(shù): 68/116頁(yè)
文件大?。?/td> 862K
代理商: MFRC53101T
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)當(dāng)前第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)
MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
68 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
10.5.6
Page 5: FIFO, timer and IRQ pin configuration
10.5.6.1
Page register
Selects the page register; see
Section 10.5.1.1 “Page register” on page 48
.
10.5.6.2
FIFOLevel register
Defines the levels for FIFO underflow and overflow warning.
Table 108. FIFOLevel register (address: 29h) reset value: 0000 1000b, 08h bit allocation
Bit
7
6
5
Symbol
00
Access
R/W
Table 109. FIFOLevel register bit descriptions
Bit
Symbol
7 to 6 00
5 to 0 WaterLevel[5:0] defines, the warning level of a FIFO buffer overflow or underflow:
HiAlert is set to logic 1, if the remaining FIFO buffer space is equal to
or less than the WaterLevel[5:0] bits in the FIFO buffer.
LoAlert is set to logic 1, if equal to or less than the WaterLevel[5:0] bits
in the FIFO buffer.
10.5.6.3
TimerClock register
Selects the divider for the timer clock.
Table 110. TimerClock register (address: 2Ah) reset value: 0000 0111b, 07h bit allocation
Bit
7
6
5
Symbol
00
TAutoRestart
Access
RW
RW
Table 111. TimerClock register bit descriptions
Bit
Symbol
7 to 6
00
5
TAutoRestart
4
3
2
1
0
WaterLevel[5:0]
R/W
Description
these values must not be changed
4
3
2
1
0
TPreScaler[4:0]
RW
Value
-
1
Function
these values must not be changed
the timer automatically restarts its countdown from the
TReloadValue[7:0] instead of counting down to zero
the timer decrements to zero and register InterruptIrq
TimerIRq bit is set to logic 1
defines the timer clock frequency (f
TimerClock
). The
TPreScaler[4:0] can be adjusted from 0 to 21. The following
formula is used to calculate the TimerClock frequency
(f
TimerClock
):
f
TimerClock
= 13.56 MHz / 2
TPreScaler
[MHz]
0
4 to 0
TPreScaler[4:0]
-
相關(guān)PDF資料
PDF描述
MFRX85201HD Secure contactless reader solution
MMBD4148 High-speed switching diode
MMBD6050-V-GS08 SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel
MMBD6050-V-GS18 SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel
MMBD7000-V-GS08 Diode Small Signal Switching 100V 0.2A 3-Pin SOT-23 T/R
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MFRC53101T/0FE,112 功能描述:RFID應(yīng)答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲(chǔ)容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
MFRC53101T/0FE112 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 5V ISO14443-A
MFRC53101T/0FE112 制造商:NXP Semiconductors 功能描述:IC RFID READER 13.56MHZ SOIC-32
MFRC630 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Contactless reader IC
MFRC63001HN,518 制造商:NXP Semiconductors 功能描述:MFRC63001HN/HVQFN32/REEL13DP// - Tape and Reel