參數(shù)資料
型號： MFRC53101T
廠商： NXP Semiconductors N.V.
元件分類： 通信及網(wǎng)絡
英文描述： ISO-IEC 14443 reader IC
封裝： MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<
文件頁數(shù)： 44/116頁
文件大?。?/td> 862K
代理商： MFRC53101T
MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
44 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
Page 4: RF Timing and channel redundancy
20h
Page
21h
RxWait
22h
ChannelRedundancy
selects the page register
selects the interval after transmission before the receiver starts
selects the method and mode used to check data integrity on
the RF channel
preset LSB value for the CRC register
preset MSB value for the CRC register
these values are not changed
selects internal signal applied to pin MFOUT, includes the MSB
of TimeSlotPeriod value; see
Table 105 on page 67
these values are not changed
Table 39 on page 48
Table 96 on page 65
Table 98 on page 65
23h
24h
25h
26h
CRCPresetLSB
CRCPresetMSB
PreSet25
MFOUTSelect
Table 100 on page 66
Table 102 on page 66
Table 104 on page 66
27h
Page 5: FIFO, timer and IRQ pin configuration
28h
Page
29h
FIFOLevel
2Ah
TimerClock
2Bh
TimerControl
2Ch
TimerReload
2Dh
IRQPinConfig
2Eh
PreSet2E
2Fh
PreSet2F
Page 6: reserved registers
30h
Page
31h
reserved
32h
reserved
33h
reserved
34h
reserved
35h
reserved
36h
reserved
37h
reserved
Page 7: Test control
38h
Page
39h
reserved
3Ah
TestAnaSelect
3Bh
reserved
3Ch
reserved
3Dh
TestDigiSelect
3Eh
reserved
3Fh
reserved
PreSet27
Table 107 on page 67
selects the page register
defines the FIFO buffer overflow and underflow warning levels
selects the timer clock divider
selects the timer start and stop conditions
defines the timer preset value
configures pin IRQ output stage
these values are not changed
these values are not changed
Table 39 on page 48
Table 47 on page 50
Table 110 on page 68
Table 112 on page 69
Table 114 on page 69
Table 116 on page 70
Table 118 on page 70
Table 119 on page 70
selects the page register
reserved
reserved
reserved
reserved
reserved
reserved
reserved
Table 39 on page 48
Table 120 on page 70
selects the page register
reserved
selects analog test mode
reserved
reserved
selects digital test mode
reserved
reserved
Table 39 on page 48
Table 121 on page 71
Table 122 on page 71
Table 124 on page 72
Table 125 on page 72
Table 126 on page 72
Table 128 on page 73
Table 37.
Sub
address
(Hex)
MFRC531 register overview
…continued
Register name
Function
Refer to
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參數(shù)描述
MFRC53101T/0FE,112 功能描述:RFID應答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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