參數(shù)資料
型號(hào): MFR4300
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: FlexRay Communication Controllers
中文描述: FlexRay通信控制器
文件頁(yè)數(shù): 77/266頁(yè)
文件大小: 1443K
代理商: MFR4300
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)當(dāng)前第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)第243頁(yè)第244頁(yè)第245頁(yè)第246頁(yè)第247頁(yè)第248頁(yè)第249頁(yè)第250頁(yè)第251頁(yè)第252頁(yè)第253頁(yè)第254頁(yè)第255頁(yè)第256頁(yè)第257頁(yè)第258頁(yè)第259頁(yè)第260頁(yè)第261頁(yè)第262頁(yè)第263頁(yè)第264頁(yè)第265頁(yè)第266頁(yè)
FlexRay Module (FLEXRAYV2)
MFR4300 Data Sheet, Rev. 1
Freescale Semiconductor
77
3.3.2.10
Global Interrupt Flag and Enable Register (GIFER)
This register provides the means to control some of the interrupt request lines and provides the
corresponding interrupt flags. The interrupt flags MIF, PRIF, CHIF, RBIF, and TBIF are the outcome of a
binary OR of the related individual interrupt flags and interrupt enables. The generation scheme for these
flags is depicted in
Figure 3-141
. For more details on interrupt generation, see
Section 3.4.19, “Interrupt
Support
. These flags are cleared automatically when all of the corresponding interrupt flags or interrupt
enables in the related interrupt flag and enable registers are cleared by the application. In this register the
application can clear only the interrupt flags WUPIF, FNEBIF, and FNEAIF, by writing ‘1’ to each them.
Writing ‘0’ will not change the flag state. If the application clears a flag and the FlexRay module sets the
flag on the same cycle, then that flag remains set.
0x0016
Write: Normal Mode
15
MIF
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
PRIF
CHIF
WUP
IF
FNEB
IF
FNEA
IF
RBIF
TBIF
MIE
PRIE
CHIE
WUP
IE
FNEB
IE
FNEA
IE
RBIE
TBIE
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 3-9. Global Interrupt Flag and Enable Register (GIFER)
Table 3-16. GIFER Field Descriptions (Sheet 1 of 3)
Field
Description
15
MIF
Module Interrupt Flag
— This flag is set if at least one of the other interrupt flags is in this register is asserted
and the related interrupt enable is asserted, too. The FlexRay module generates the module interrupt request if
MIE is asserted.
0 No interrupt flag is asserted or no interrupt enable is set
1 At least one of the other interrupt flags in this register is asserted and the related interrupt bit is asserted, too
Protocol Interrupt Flag
— This flag is set if at least one of the individual protocol interrupt flags in the
Protocol
Interrupt Flag Register 0 (PIFR0)
and
Protocol Interrupt Flag Register 1 (PIFR1)
is asserted and the related
interrupt enable flag is asserted, too. The FlexRay module generates the combined protocol interrupt request if
the PRIE flag is asserted.
0 All individual protocol interrupt flags are equal to 0 or no interrupt enable bit is set.
1 At least one of the individual protocol interrupt flags and the related interrupt enable is equal to 1.
CHI Interrupt Flag
— This flag is set if at least one of the individual CHI error flags in the
CHI Error Flag Register
(CHIERFR)
is asserted and the chi error interrupt enable GIFER.CHIE is asserted. The FlexRay module
generates the combined CHI error interrupt if the CHIE flag is asserted, too.
0 All CHI error flags are equal to 0 or the chi error interrupt is disabled
1 At least one CHI error flag is asserted and chi error interrupt is enabled
Wakeup Interrupt Flag
— This flag is set when the FlexRay module has received a wakeup symbol on the
FlexRay bus. The application can determine on which channel the wakeup symbol was received by reading the
related wakeup flags WUB and WUA in the
Protocol Status Register 3 (PSR3).
The FlexRay module generates
the wakeup interrupt request if the WUPIE flag is asserted.
0 No wakeup condition or interrupt disabled
1 Wakeup symbol received on FlexRay bus and interrupt enabled
Receive FIFO channel B Not Empty Interrupt Flag
— This flag is set when the receive FIFO for channel B is
not empty. If the application writes 1 to this bit, the FlexRay module updates the FIFO status, increments or wraps
the FIFO read index in the
Receive FIFO B Read Index Register (RFBRIR)
and clears the interrupt flag if the
FIFO B is now empty. If the FIFO is still not empty, the FlexRay module sets this flag again. The FlexRay module
generates the Receive FIFO B Not empty interrupt if the FNEBIE flag is asserted.
0 Receive FIFO B is empty or interrupt is disabled
1 Receive FIFO B is not empty and interrupt enabled
13
PRIF
13
CHIF
12
WUPIF
11
FNEBIF
相關(guān)PDF資料
PDF描述
MG-3020DD Crystal oscillator
MG-3020DD Multi-Output Crystal Oscillator(多輸出晶體振蕩器)
MG-5100SA Multi-Output Crystal Oscillator(多輸出晶體振蕩器)
MG-7010SA Crystal oscillator
MG-7010SA Selectable-Output PLL Oscillator(輸出可選鎖相環(huán)振蕩器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MFR4300_07 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:FlexRay Communication Controllers
MFR4300FRDC 功能描述:開發(fā)板和工具包 - S08 / S12 FLXRAY MFR4300 EVB RoHS:否 產(chǎn)品:Development Kits 工具用于評(píng)估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor
MFR4-30K9FI 制造商:TT Electronics / Welwyn 功能描述: 制造商:Welwyn Components 功能描述: 制造商:TT Electronics / Welwyn 功能描述:Res Metal Film 30.9K Ohm 1% 1/4W ±100ppm/°C Conformal AXL Thru-Hole Ammo Pack
MFR4310E1MAE40 制造商:Freescale Semiconductor 功能描述:MFR4300 FLEXRAY - Trays
MFR4310FRDC 功能描述:子卡和OEM板 FLXRAY MFR4300 EVB RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit