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參數(shù)資料
| 型號(hào)： | MCZ33784EFR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 18/30頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SENSOR DBUS DSI 2.02 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 傳感器接口 |
| 輸入類型： | 模擬 |
| 輸出類型： | 數(shù)字 |
| 接口： | 總線 |
| 電流 - 電源： | 4mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 帶卷 (TR) |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
25
33784
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
COMMAND SUMMARY
Refer to Table 10 for a summary of the commands
available in the 33784. The responses to these commands
page 27. The four-bit CRC, which appended to the end of
every command and every response, has been committed.
Table 10. Command Summary
Command Names
Data (LW & ELW only)
Address
Command
Hex
Description
D7
D6
D5
D4
D3
D2
D1
D0
A3
A2
A1
A0
C3
C2
C1
C0
0
Initialization
–
BSH
BSL
OD
PA3
PA2
PA1
PA0
A3
A2
A1
A0
0
1
Request Status
–
A3
A2
A1
A0
0
1
2
Request AN0
–
A3
A2
A1
A0
0
1
0
3
I/O Control
–
L2
L1
L0
–
DR2
DR1
DR0
A3
A2
A1
A0
0
1
4
Request ID
Information
–
A3
A2
A1
A0
0
1
0
5
Request AN1
–
A3
A2
A1
A0
0
1
0
1
6
Reserved
–
A3
A2
A1
A0
0
1
0
7
Clear
–
A3
A2
A1
A0
0
1
8
Reserved
–
A3
A2
A1
A0
1
0
9
Reserved
–
A3
A2
A1
A0
1
0
1
A
Format Control
R/W ADDR2 ADDR1 ADDR0 DATA3 DATA2 DATA1 DATA0 A3
A2
A1
A0
1
0
1
0
B
Reserved
C
Reserved
D
Reserved
E
Reserved for test
F
Reserved
–
-
–
-
---
--
---
Legend
BSH = Controls closing of the High Side Bus Switch (1 = close).
BSL = Controls closing of the Low Side Bus Switch (1 = close).
DR[2:0] = Direction of I/O. 1 = Output.
L[2:0] = Level to output on I/O if configured as outputs.
“–” = Don’t care bit. Can be 0 or 1.
PA[3:0] = Bus Address to set the device to.
R/W = Controls if this is a read or write. Write = 1.
ADDR[2:0] = Pointer to Format Control Register that is to be accessed.
DATA[3:0] = Data to read from or write to in the pointed to Format Control
Register.
OD = Oscillator dither:
0 = no dither (default)
1 = dither
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