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參數資料
| 型號： | MCZ33784EFR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 16/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SENSOR DBUS DSI 2.02 16-SOIC |
| 標準包裝： | 2,500 |
| 類型： | 傳感器接口 |
| 輸入類型： | 模擬 |
| 輸出類型： | 數字 |
| 接口： | 總線 |
| 電流 - 電源： | 4mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SOIC N |
| 包裝： | 帶卷 (TR) |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
23
33784
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
CLEAR COMMAND AND RESPONSE
This command will open the bus switch and reset all
registers to the reset state. The command format is found in
Figure 16. No response is generated for the clear command.
The 33784 will only act on this command if the address bits
in the command match the address that the device was
initialized with, or if the address bits are 0000.
Figure 16. Clear Command Format and Response Format
FORMAT CONTROL COMMAND AND RESPONSE
This command allows the short-word length, the CRC
polynomial, and the CRC seed to be changed. It is also the
command needed to switch the device from the “standard”
mode to the “enhanced” mode.
The response is sent during the next message following a
valid Format Control command to the addressed device.
Because this is a long-word only command, there is no short
word response.
On power-up or following a “Clear” command, the device
uses the standard DSI short-word length (8 data bits) and
standard CRC polynomial (x4 + 1) and seed (1010).
The registers associated with Format Control default to
values that correspond to Standard DBUS operation upon
power-up, or at the issuance of a “Clear” command.
Changes made to the Format Control Register do not
become active until the 4 bits of the format selection register
are set during a single write command. It will not switch back
to Standard DBUS settings unless all 4 bits of the format
selection register are cleared by a single write.
Any attempts to change the format will be ignored while in
the enhanced mode.
The Format Control command is a long-word Command
and contains 8 bits of data which are used to determine read
or write, the specific format control register, and the data to
be written/read. The format for this command is defined in
If the R/W bit is set, the value in the Data Bits will be written
to the format control register pointed to by the 3-bit format
register address. If the R/W bit is clear, the bits in the register
pointed to by the format register address will not be changed,
but the values in it will be returned in the following response
from the device. No data can be written to the reserved
registers.
The response to this command will be the data that was
written/read by the command. Attempts to write to the
reserved registers will return zeros in the data bits of the
response.
The 33784 will only act on the Format Control Command if
the address bits in the command match the address that the
device was initialized with. If the addresses do not match, the
device will do nothing and no response will be generated. The
only exception is the global address of 0000. If the address
bits in the command are 0000, the 33784 will perform all
normal functions associated with the command, but no
response will be generated.
Data
Address
Command
Word Type
––––––––
A3
A2
A1
A0
0111
LW & ELW
A3
A2
A1
A0
0111
SW & ESW (8-bit)
––
A3
A2
A1
A0
0111
ESW (10-bit)
Response
Word Type
No Response
LW & ELW
No Response
SW & ESW (8-bit)
No Response
ESW (10-bit)
Legend
A[3:0] = Address bits. The address of the selected device.
An address value of 0000 clears all devices.
“–” = Don’t care bit. Can be 0 or 1.
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