參數(shù)資料
型號: MC68HC705C9ACP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Microcontrollers
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 140/160頁
文件大?。?/td> 2076K
代理商: MC68HC705C9ACP
Electrical Specifications
Advance Information
MC68HC705C9A — Rev. 4.0
140
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Figure 12-5. External Interrupt Timing
Figure 12-6. STOP Recovery Timing Diagram
IRQ
t
ILIH
t
ILIL
t
ILIH
IRQ PIN
I.
.
.
IRQN
a.
Edge-Sensitive Trigger Condition
. The minimum pulse width (t
) is either 125 ns (f
= 2.1 MHz)
or 250 ns (f
= 1 MHz). The period t
should not be less than the number of t
CYC
cycles it takes to
execute the interrupt service routine plus 19 t
CYC
cycles.
b.
Level-Sensitive Trigger Condition
. If after servicing an interrupt the IRQ remains low,
the next interrupt is recognized
(INTERNAL)
NORMALLY
USED WITH
WIRED-OR
CONNECTION
t
ILIH
4064 t
CYC
OSC
(1)
t
RL
RESET
IRQ
(2)
IRQ
(3)
INTERNAL
CLOCK
Notes:
1. Represents the internal clocking of the OSC1 pin
2. IRQ pin edge-sensitive mask option
3. IRQ pin level- and edge-sensitive mask option
4. RESET vector address shown for timing example
RESET OR INTERRUPT
VECTOR FETCH
3FFE
3FFE
3FFE
3FFE
3FFE
3FFF4
F
Freescale Semiconductor, Inc.
n
.
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