參數(shù)資料
型號: MC68HC705C9ACP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Microcontrollers
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 111/160頁
文件大?。?/td> 2076K
代理商: MC68HC705C9ACP
Serial Peripheral Interface (SPI)
SPI Registers
MC68HC705C9A — Rev. 4.0
Advance Information
MOTOROLA
Serial Peripheral Interface (SPI)
For More Information On This Product,
Go to: www.freescale.com
111
SPR1 and SPR0 — SPI Clock Rate Selects
These read/write bits select one of four master mode serial clock
rates, as shown in
Table 10-1
. They have no effect in the slave mode.
10.6.2 Serial Peripheral Status Register
The SPI status register (SPSR), shown in
Figure 10-5
, contains flags to
signal the following conditions:
SPI transmission complete
Write collision
Mode fault
SPIF — SPI Transfer Complete Flag
The serial peripheral data transfer flag bit is set upon completion of
data transfer between the processor and external device. If SPIF
goes high, and if SPIE is set, a serial peripheral interrupt is generated.
Clearing the SPIF bit is accomplished by reading the SPSR (with
Table 10-1. SPI Clock
Rate Selection
SPR[1:0]
SPI Clock Rate
00
Internal Clock
÷
2
01
Internal Clock
÷
4
10
Internal Clock
÷
16
11
Internal Clock
÷
32
$000B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SPIF
WCOL
MODF
Write:
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 10-5. SPI Status Register
F
Freescale Semiconductor, Inc.
n
.
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