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| 型號： | MC68HC16Z1VEH16 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 4/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 16BIT 1K FLASH 132-PQFP |
| 標準包裝： | 36 |
| 系列： | HC16 |
| 核心處理器： | CPU16 |
| 芯體尺寸： | 16-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 包裝： | 托盤 |
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MC68HC16Z1TUT/D
Figure 6 Conditioning the XFC and VDDSYN Pins
2.5.2.5 Evaluating Oscillator Performance
Once an entire oscillator circuit is built, it is very important to evaluate circuit characteristics. Of partic-
ular interest is how the oscillator starts. If the oscillator starts in a metastable state that persists for sev-
eral hundred milliseconds, it is quite possible that this state will persist until the MCU releases reset and
tries to start fetching instructions. When this happens, the PLL may well be operating at a frequency far
greater than the maximum specified for the MCU. Any variation in the input frequency of the PLL is mul-
tiplied by the feedback ratio of the PLL. If the MCU starts operating, i.e., reset is released and the inter-
nal clocks are gated to the internal buses, while the oscillator is operating at an overtone or first
harmonic, the MCU will probably enter an inoperative state in which it cannot be restarted by a hardware
reset. In this case, the only option is to turn the system power off and then attempt a power-on reset.
Because oscillators are very sensitive circuits, malfunctions are difficult to diagnose by conventional
means such as probing the input and output with an oscilloscope. The capacitance of a scope probe
can be large compared to the effective capacitance of the particular node of the oscillator that is probed.
This added capacitance can cause an errant oscillator to move to a more stable region where it appears
to work correctly or, on the other hand, a working oscillator could be moved into a region of no oscillation
at all. Therefore, it is important to measure oscillator performance indirectly. This can be done through
the CLKOUT pin, which is a buffered form of the internal system clock. Monitoring the CLKOUT pin with
an oscilloscope does not affect the oscillator and provides an accurate representation of oscillator prob-
lems. If the MCU is running off the internal PLL and a 32.768 kHz crystal, the CLKOUT frequency should
be 8.389 MHz at the release of reset.
The CLKOUT signal is likely to do one of three things when power is turned on. It will either remain at
a constant DC level, jump quickly to the proper frequency, or, first jump to the desired frequency, then
enter a very high frequency metastable state and then jump back to the fundamental frequency. With a
small amount of practice, these metastable states, which last for approximately 100 to 500 ms, can be
easily detected on an oscilloscope. In the third case, the MCU generally takes almost a second to reach
steady state, which provides plenty of time for it to attempt operation while the clock is in a metastable
state.
2.5.2.6 Using a Canned Oscillator
A second option when using the internal frequency synthesizer circuit is to hold MODCLK high during
reset and connect an external clock reference or canned oscillator (a single package that includes the
oscillator and required external components) to the EXTAL pin. Leave the XTAL pin floating, but con-
kHz.
One manufacturer of canned oscillators is:
332TUT XFC CONN
* MAINTAIN LOW LEAKAGE ON THE XFC NODE.
VDDSYN
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XFC*
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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