![](http://datasheet.mmic.net.cn/Freescale-Semiconductor/MC68HC16Z1VEH16_datasheet_98737/MC68HC16Z1VEH16_37.png)
B. BYTE — This field determines whether to assert the chip-select signal for an upper-byte ac-
cess, lower-byte access, both, or neither. When two 8-bit memories are used to make up one
16-bit port, the associated chip-select circuits are programmed identically except for BYTE
field values — select upper byte for one and lower byte for the other.
C. R/W — This field specifies whether to assert the chip-select signal during a read cycle, a write
cycle, or both. When the chip-select circuit is used to generate an IACK signal or to provide an
autovector, this field must be set to “read” or “read/write”.
D. STRB — This field specifies whether chip-select assertion is synchronous with AS or DS. If a
chip-select circuit is used to generate an IACK signal or to provide an autovector, this field
should be set to “AS”.
E. DSACK — This field either specifies the number of wait states to insert before the chip-select
circuit asserts DSACK and terminates the bus cycle, or it specifies that the external device
must provide the DSACK signal by driving the external DSACK pins. Assertion of the external
DSACK pins will terminate a bus cycle even if the DSACK field is programmed for a certain
number of wait states. If a chip-select circuit is used to provide an autovector, fast termination
is automatically selected, and the DSACK field is not used. For more information on how to
F. SPACE — This field indicates the address space of the access. To access memory, select
supervisor or supervisor/user space. For IACK cycles, select CPU space.
G. IPL — If the chip-select circuit is used to provide an IACK signal or AVEC, the IPL field indi-
cates the interrupt priority level selected.
H. AVEC — This field determines whether a chip-select circuit generates an autovector in re-
sponse to an IACK initiated by the assertion of an IRQ pin. For normal bus cycles, this field is
not used. If a chip-select circuit is to be used to generate an IACK signal, program this field to
zero to disable autovector generation. If a chip-select is to be used to generate an autovector,
program this field to one.
4.2.9 General-Purpose I/O Ports
Certain SIM pins can be configured as general-purpose I/O ports when not used for other purposes.
Port E pins share function with bus-control signals, port F pins share function with interrupt request sig-
nals, and port C (output only) pins share functions with chip-select signals. The ports are controlled by
pin assignment registers (CSPAR, PEPAR, and PFPAR) and data direction registers (DDRE and
DDRF). Pin assignment registers determine whether a pin is used for general-purpose I/O or for another
function. Data direction registers determine whether an I/O pin is an input or an output. Data is written
to and read from the port data registers (PORTC, PORTE and PORTF).
1. Assign port pins by writing to pin assignment registers.
2. Program the data direction registers to assign input or output function to port pins.
3. Use the Port data registers to read/write data.
4.2.10 Example of SIM Initialization
This example assumes that three other files, equates.asm, init_res.asm and init_int.asm, exist. The file
equates.asm defines labels for the internal registers. The file init_res.asm initializes the reset vector. It
set. This file is not necessary for debugging, but should be included in final application code. This ex-
ample can be assembled with the IASM16 assembler available from P&E Microcomputer Systems. This
example is in the file “init_res.asm” in the archive “sim_init” on the Freeware Data System.
This example initializes chip selects 0, 1, and 2 to select two 8-bit external RAMs. The RAMs are
mapped at address $30000. It also initializes the periodic interrupt timer to time out every one second.
INCLUDE 'equates.asm'
;include register equates
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Freescale Semiconductor, Inc.
For More Information On This Product,
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