參數(shù)資料
型號(hào)： MC68HC16Z1VEH16
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 27/56頁(yè)
文件大?。?/td> 0K
描述： IC MCU 16BIT 1K FLASH 132-PQFP
標(biāo)準(zhǔn)包裝： 36
系列： HC16
核心處理器： CPU16
芯體尺寸： 16-位
速度： 16MHz
連通性： EBI/EMI，SCI，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 16
程序存儲(chǔ)器類(lèi)型： ROMless
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 132-BQFP 緩沖式
包裝： 托盤(pán)
Table 6 is an overview of the exception vector table. Refer to SECTION 9 EXCEPTION PROCESSING
in the
CPU16 Reference Manual (CPU16RM/AD) for detailed discussion of exception processing and
a complete list of exception vectors.
The first four words in the exception vector table are used for the initial ZK, SK, and PK values, the initial
stack pointer and program counter values, and the initial IZ register value. These are referred to collec-
tively as the reset vector, because the CPU16 loads them during reset exception processing. Unlike oth-
er vectors, the reset vector is mapped to program space, to facilitate fetching the values. The reset
vector is always located at address $000000.
All the other exception vectors occupy one word in the table, and are located in data space. These vec-
tors point to the beginning of software routines that handle particular exceptions. All the vectors in the
exception vector table must be initialized. The reset vector is generally fetched from external ROM. Cor-
rect initial values for the reset vector must be written to addresses $000000 through $000006 in order
for the system to begin program execution.
Following is an example of how the exception vector table works. An external device asserts IRQ7, and
the CPU acknowledges the interrupt service request. The external device must either provide a user
vector number on the data bus and then terminate the bus cycle by asserting DSACK, or it must assert
AVEC and allow the processor to automatically supply the level 7 autovector number, which is $17. As-
suming the external device asserts AVEC, vector number $17 is automatically supplied to the CPU16.
The CPU16 multiplies the vector number by two to calculate the vector address, which in this case is
$2E. The CPU reads address $2E and uses the 16-bit number it contains as the starting address of the
interrupt service routine. It does not use the PK register when jumping to exception routines except in
the case of the reset vector. All other exception handlers must be located within bank 0, or vectors must
point to a jump table.
Table 6 Exception Vector Table
Vector Number
(Hexadecimal)
Vector Offset
(Hexadecimal)
Assignment
0
Reset: Initial ZK, SK, and PK
1
2
Reset: Initial Program Counter
2
4
Reset: Initial Stack Pointer
3
6
Reset: Initial IZ (Direct Page)
4 – 8
8 – 10
Various Errors and Exceptions
9 – E
12 – 1C
Unassigned, Reserved
F
1E
Uninitialized Interrupt
10
20
Unassigned, Reserved
11
22
Level 1 Interrupt Autovector
12
24
Level 2 Interrupt Autovector
13
26
Level 3 Interrupt Autovector
14
28
Level 4 Interrupt Autovector
15
2A
Level 5 Interrupt Autovector
16
2C
Level 6 Interrupt Autovector
17
2E
Level 7 Interrupt Autovector
18
30
Spurious Interrupt
19 – 37
32 – 6E
Unassigned/Reserved
38 – FF
70 – 1FE
User Defined Interrupts
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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