參數(shù)資料
型號(hào): MC68HC11KW1
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: High-density complementary metal oxide semiconductor HCMOS) microcontroller unit
中文描述: 8-BIT, EEPROM, 4 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 54/238頁(yè)
文件大?。?/td> 798K
代理商: MC68HC11KW1
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MOTOROLA
4-10
MC68HC11KW1
OPERATING MODES AND ON-CHIP MEMORY
4
4.3
System initialization
Registers and bits that control initialization and the basic operation of the MCU are protected
against writes except under special circumstances. The following table lists registers that can be
written only once after reset, or that must be written within the first 64 cycles after reset.
4.3.1
Mode selection
The four mode variations are selected by the logic states of the mode A (MODA) and mode B
(MODB) pins during reset. The MODA and MODB logic levels determine the logic state of the
special mode (SMOD) and mode A (MDA) control bits in the highest priority I-bit interrupt and
miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the MCU operating mode. In
single chip operating mode, MODA pin is connected to a logic zero. In expanded mode, MODA is
normally connected to V
DD
through a pull-up resistor of 4.7 k
the load instruction register (LIR) pin when the MCU is not in reset. The open-drain active low LIR
output pin drives low during the first E cycle of each instruction. The MODB pin also functions as
the stand-by power input (VSTBY), which allows the RAM contents to be maintained in the
absence of V
DD
.
. The MODA pin also functions as
Table 4-3
Registers with limited write access
Register
address
$x024
$x035
$x037
$x038
$x039
$x03D
$x081
$x091
Register
name
Must be written in
first 64 cycles
(1)
Write
once only
Yes
(3)
Timer interrupt mask register 2 (TMSK2)
Block protect register (BPROT)
EEPROMmapping register (INIT2)
Systemconfiguration options register 2 (OPT2)
Systemconfiguration options register (OPTION)
RAMand I/O map register (INIT)
Timer control register 4 (Timer 2) TCTL4
Timer control register 6 (Timer 3) TCTL6
(1) When SMOD = 0, bits 1 and 0 can be written only once, during the first 64 cycles, after which they become read-only.
When SMOD = 1, however these bits can be written at any time. All other bits can be written at any time.
(2)
(2) Bits can be written to zero once and only in the first 64 cycles or in special modes. Bits can be set to one at any time.
No
No
(4)
(3) Bit 4 (IRVNE) can be written only once.
(4) When SMOD = 0, bits 5, 4, 2, 1, and 0 can be written once and only in the first 64 cycles. When SMOD = 1,
however, bits 5, 4, 2, 1, and 0 can be written at any time. All other bits can be written at any time.
(6)
(5)
(5) When SMOD = 0, bits can be written only once, during the first 64 cycles, after which the register becomes
read-only. When SMOD = 1, bits can be written at any time.
No
No
(6) Bits 5, 4, 3 and 2 can be written only once.
(6)
TPG
52
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