![](http://datasheet.mmic.net.cn/30000/MC68307CFG16_datasheet_2368698/MC68307CFG16_115.png)
System Integration Module
5-20
MC68307 USER’S MANUAL
MOTOROLA
In the case of the UART, its clock is restarted automatically by a transition on the RxD pin,
so that incoming data is clocked in. When the data has been completely received, then an
interrupt from the UART can wake-up the core processor as described above. If the other
on-chip modules are required to cause a wake-up (the timer and M-bus), then their clocks
should not be gated off in this manner.
5.2 PROGRAMMING MODEL
The various modules in the MC68307, including the SIM, contain registers which are used
to control the modules and provide status information from the modules. Most of these
registers reside in one 4096-byte range of addresses in the memory map of the EC000 core
processor. The only exceptions to this rule are the MBAR and the SCR. These reside in the
initial memory map of the MC68307 overlaying Motorola-reserved locations of the exception
vector table.
Table 5-5 shows all MC68307 on-chip locations.
Table 5-5. MC68307 Configuration Memory Map
Address
System Configuration Registers
$0000F0
Reserved–No External Bus Access
$0000F2
Module Base Address Register (MBAR)
$0000F4
System Control Register (SCR)
$0000F6
System Control Register (SCR), continued
$0000F8
Reserved–No External Bus Access
$000FA
Reserved–No External Bus Access
$0000FC
Reserved–No External Bus Access
$0000FE
Reserved–No External Bus Access
Address
SIM Module–External Bus Interface Registers
MBASE+$011
Do Not Access Byte $010
Port A Control Register (PACNT)
MBASE+$013
Do Not Access Byte $012
Port A Data Direction Register (PADDR)
MBASE+$015
Do Not Access Byte $014
Port A Data Register (PADAT)
MBASE+$016
Port B Control Register (PBCNT)
MBASE+$018
Port B Data Direction Register (PBDDR)
MBASE+$01A
Port B Data Register (PBDAT)
Address
SIM Module–Interrupt Controller Registers
MBASE+$020
Latched Interrupt Control Register 1 (LICR1)
MBASE+$022
Latched Interrupt Control Register 2 (LICR2)
MBASE+$024
Peripheral Interrupt Control Register (PICR)
MBASE+$027
Do Not Access Byte $026
Programmable Interrupt Vector Reg (PIVR)
Address
SIM Module–Chip Select Registers
MBASE+$040
Base Register 0 (BR0)
MBASE+$042
Option Register 0 (OR0)
MBASE+$044
Base Register 1 (BR1)
MBASE+$046
Option Register 1 (OR1)
MBASE+$048
Base Register 2 (BR2)