參數(shù)資料
型號: MC10SX1125A
廠商: ON SEMICONDUCTOR
英文描述: 622Mb/s Fiber Optic Post Amplifier(622Mb/s 光纖后置放大器)
中文描述: 622Mb / s的光纖后置放大器(622Mb / s的光纖后置放大器)
文件頁數(shù): 1/8頁
文件大小: 96K
代理商: MC10SX1125A
Semiconductor Components Industries, LLC, 2000
April, 2000 – Rev. 0
1
Publication Order Number:
MC10SX1125A/D
The SX1125A is an integrated limiting amplifier for high frequency
fiber optic applications. The device interfaces directly to the
trans–impedance amplifier of a typical optical to electrical conversion
portion of a fiber optic link. With data rate capabilities in the 622Mb/s
range, the high gain limiting amplification of the SX1125A is ideal for
high speed fiber optic applications like SONET/SDM, ATM, FDDI,
Fibre Channel or Serial Hippi. The device is functionally and pin
compatible to the Signetics SA5225 with a significantly higher
bandwidth. The CAZP and CAZN inputs to the limiting amplifier
provide an auto-zero function to effectively cancel any input offset
voltage present in the amplifier.
The SX1125A incorporates a programmable level detect function to
identify when the input signal has been lost. This information can be
fed back to the Disable input of the device to maintain stability under
loss of signal conditions. Using the Vset pin the sensitivity of the level
detect can be adjusted. The CLD input is used to filter the level detect
input so that random noise spikes are filtered out.
The MC10SX1125A is compatible with MECL10H logic levels.
Wideband Operation: 20kHz to 550MHz
Programmable Input Signal Level Detection
Operation with single +5V or standard ECL supply
Standard 16-lead SOIC Package
Fully Differential Design to Minimize Noise Affects
10KH Compatible
BLOCK DIAGRAM
LOS
LOS
Dout
Dout
Reference
ECL
Buffer
Level
Detect
Limting
Amplifier
ECL
Buffer
Disable
Disable
CLD
Din
Din
Vref
Vset
CAZPCAZN
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
http://onsemi.com
SO–16
D SUFFIX
CASE 751B
1
16
MARKING
DIAGRAM
A
WL = Wafer Lot
Y
= Year
WW = Work Week
= Assembly Location
1
16
Device
Package
SO–16
Shipping
48 / Rail
ORDERING INFORMATION
MC10SX1125AD
MC10SX1125ADR2
SO–16
2500 / Reel
PIN ASSIGNMENT
15
16
14
13
12
11
10
2
1
3
4
5
6
7
Vset
9
8
Vref VCCE Dout
DoutGNDE LOS
LOS
CAZNCAZPGNDA
Din
Din
VCCA CLD Disable
Pinout: 16-Lead Plastic Package
(Top View)
10SX1125A
AWLYWW
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