參數(shù)資料
型號: MC12080
廠商: ON SEMICONDUCTOR
英文描述: 1.1GHz Prescaler(1.1GHz 預(yù)定標(biāo)器)
中文描述: 1.1GHz的預(yù)分頻(1.1GHz的預(yù)定標(biāo)器)
文件頁數(shù): 1/4頁
文件大?。?/td> 123K
代理商: MC12080
Semiconductor Components Industries, LLC, 2006
January, 2006
Rev. 6
1
Publication Order Number:
MC12080/D
MC12080
1.1 GHz Prescaler
Description
The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler
for low power frequency division of a 1.1 GHz high frequency input
signal. Divide ratio control inputs SW1, SW2 and SW3 select the
required divide ratio of
÷
10,
÷
20,
÷
40, or
÷
80.
An external load resistor is required to terminate the output. An
820 resistor is recommended to achieve a 1.2 V
pp
output swing,
when dividing a 1.1 GHz input signal by the minimum divide by ratio
of 10, assuming a 8.0 pF load. Output current can be minimized
dependent on conditions such as output frequency, capacitive load
being driven, and output voltage swing required. Typical values for
load resistors are included in the V
out
specification for various divide
ratios at 1.1 GHz input frequency.
Features
1.1 GHz Toggle Frequency
Supply Voltage 4.5 to 5.5 V
Low Power 3.7 mA Typical at V
CC
= 5.0 V
Operating Temperature Range of
40 to 85
°
C
Pb
Free Packages are Available
Table 1. FUNCTIONAL TABLE
SW1
SW2
SW3
Divide Ratio
L
L
L
80
L
L
H
40
L
H
L
40
L
H
H
20
H
L
L
40
H
L
H
20
H
H
L
20
H
H
H
10
NOTE:
SW1, SW2 and SW3: H = V
CC
, L = Open.
Table 2. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage, Pin 2
V
CC
0.5 to 7.0
Vdc
Operating Temperature Range
T
A
40 to 85
°
C
Storage Temperature Range
T
stg
65 to 150
°
C
Maximum Output Current, Pin 4
I
O
10
mA
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
NOTE:
ESD data available upon request.
SOIC
8
D SUFFIX
CASE 751
PIN CONNECTIONS
MARKING
DIAGRAM
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb
Free Package
In
SW3
SW2
GND
8
In
V
CC
SW1
Out
7
6
5
1
2
3
4
(Top View)
http://onsemi.com
1
8
12080
ALYW
1
8
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
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