Semiconductor Components Industries, LLC, 2006
October, 2006
Rev. 7
1
Publication Order Number:
MC14024B/D
MC14024B
7Stage Ripple Counter
The MC14024B is a 7
stage ripple counter with short propagation
delays and high maximum clock rates. The Reset input has standard
noise immunity, however the Clock input has increased noise
immunity due to Hysteresis. The output of each counter stage is
buffered.
Features
Diode Protection on All Inputs
Output Transitions Occur on the Falling Edge of the Clock Pulse
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low
power TTL Loads or One Low
power
Schottky TTL Load Over the Rated Temperature Range
Pin
for
Pin Replacement for CD4024B
Pb
Free Packages are Available
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
Parameter
Value
Unit
V
DD
DC Supply Voltage Range
0.5 to +18.0
V
V
in
, V
out
Input or Output Voltage Range
(DC or Transient)
0.5 to V
DD
+ 0.5
V
I
in
, I
out
Input or Output Current
(DC or Transient) per Pin
±
10
mA
P
D
Power Dissipation, per Package
(Note 1)
500
mW
T
A
Ambient Temperature Range
55 to +125
°
C
T
stg
Storage Temperature Range
65 to +150
°
C
T
L
Lead Temperature
(8
Second Soldering)
260
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high
impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
1
14
PDIP
14
P SUFFIX
CASE 646
MC14024BCP
AWLYYWWG
SOIC
14
D SUFFIX
CASE 751A
1
14
14024BG
AWLYWW
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb
Free Package
SOEIAJ
14
F SUFFIX
CASE 965
1
14
MC14024B
ALYWG
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION