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參數(shù)資料
| 型號： | MAXADCLITE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION FOR MAX11645 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 94.4k |
| 數(shù)據(jù)接口： | USB |
| 輸入范圍： | ±VREF/2 |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | MAX11645 |
| 已供物品： | 板，軟件 |
MAX11644/MAX11645
Low-Power, 1-/2-Channel, I2C, 12-Bit ADCs
in Ultra-Tiny 1.9mm x 2.2mm Package
______________________________________________________________________________________
13
Slave Address
A bus master initiates communication with a slave
device by issuing a START condition followed by a
slave address. When idle, the MAX11644/MAX11645
continuously wait for a START condition followed by
their slave address. When the MAX11644/MAX11645
recognize their slave address, they are ready to accept
or send data. The slave address is factory programmed
to 0110110. The least significant bit (LSB) of the
address byte (R/W) determines whether the master is
writing to or reading from the MAX11644/MAX11645
(R/W = 0 selects a write condition, R/W = 1 selects a
read condition). After receiving the address, the
MAX11644/MAX11645 (slave) issues an acknowledge
by pulling SDA low for one clock cycle.
Bus Timing
At power-up, the MAX11644/MAX11645 bus timing is
set for fast-mode (F/S mode), which allows conversion
rates up to 22.2ksps. The MAX11644/MAX11645 must
operate in high-speed mode (HS mode) to achieve con-
version rates up to 94.4ksps. Figure 1 shows the bus
timing for the MAX11644/MAX11645’s 2-wire interface.
HS Mode
At power-up, the MAX11644/MAX11645 bus timing is
set for F/S mode. The bus master selects HS mode by
addressing all devices on the bus with the HS-mode
master code 0000 1XXX (X = don’t care). After suc-
cessfully receiving the HS-mode master code, the
MAX11644/MAX11645 issue a not-acknowledge, allow-
ing SDA to be pulled high for one clock cycle (Figure
8). After the not-acknowledge, the MAX11644/
MAX11645 are in HS mode. The bus master must then
send a repeated START followed by a slave address to
initiate HS mode communication. If the master gener-
ates a STOP condition, the MAX11644/MAX11645
return to F/S mode.
01
1
0
1
0
R/W
A
SLAVE ADDRESS
S
SCL
SDA
1
2
34
567
8
9
MAX11644/MAX11645
SEE ORDERING INFORMATION FOR SLAVE ADDRESS OPTIONS AND DETAILS.
Figure 7. MAX11644/MAX11645 Slave Address Byte
000
1
0X
X
A
HS-MODE MASTER CODE
SCL
SDA
S
Sr
F/S MODE
HS MODE
Figure 8. F/S-Mode to HS-Mode Transfer
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAXADCLITE# | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX11645 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAXADCLITE+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX11645 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX-B550 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:THREE-CD CHANGER MINI-COMPACT SYSTEM CD-R/RW PLAYBACK |
| MAX-B570 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:THREE-CD CHANGER MINI-COMPACT SYSTEM CD-R/RW PLAYBACK |
| MAXC001 | 制造商:Maxim Integrated Products 功能描述: |
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