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參數(shù)資料
| 型號(hào)： | MAX9850ETI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Stereo Audio DAC with DirectDrive Headphone Amplifier |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC28 |
| 封裝： | 5 X 5 MM, 0.80 MM PITCH, MO-220WHHD-1, TQFN-28 |
| 文件頁數(shù)： | 29/36頁 |
| 文件大小： | 956K |
| 代理商： | MAX9850ETI |
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A master reading data from the MAX9850 transmits the
proper slave address followed by a series of nine SCL
pulses. The MAX9850 transmits data on SDA in sync with
the master-generated SCL pulses. The master acknowl-
edges receipt of each byte of data. Each read sequence
is framed by a START (S) or REPEATED START (S
r
) con-
dition, a not acknowledge, and a STOP (P) condition.
SDA operates as both an input and an open-drain out-
put. A pullup resistor, typically greater than 500
, is
required on the SDA bus. SCL operates as an input only.
A pullup resistor, typically greater than 500
, is required
on SCL if there are multiple masters on the bus, or if the
master in a single-master system has an open-drain SCL
output. Series resistors in line with SDA and SCL are
optional. Series resistors protect the digital inputs of the
MAX9850 from high-voltage spikes on the bus lines, and
minimize crosstalk and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the
START and STOP
Conditions
section). SDA and SCL idle high when the
I
2
C bus is not busy.
M
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________
29
X 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
X 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
LRCLK
SDIN
BCLK
LRCLK
SDIN
BCLK
LRCLK
SDIN
BCLK
I
2
S
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00001000
LEFT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000000
RIGHT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000100
Figure 4. Right-Justified, Left-Justified and I
2
S Audio Data Formats (Slave Mode, 16-Bit Data)
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
t
HD, STA
t
HD, STA
t
HD, STA
t
SP
t
BUF
t
SU, STO
t
LOW
t
SU, DAT
t
HD, DAT
t
HIGH
t
R
t
F
Figure 5. 2-Wire Interface Timing Diagram
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| MAX9850ETI+ | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Stereo Audio DAC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| MAX9850ETI+G47 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Stereo Audio DAC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| MAX9850ETI+T | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Stereo Audio DAC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| MAX9850ETI+TG47 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Stereo Audio DAC w/DirectDrive Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| MAX9850ETI-T | 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO DAC WITH DIRECTDRIVE HEADPHONE A - Tape and Reel |
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