參數(shù)資料
型號(hào): MAX9850ETI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 消費(fèi)家電
英文描述: Stereo Audio DAC with DirectDrive Headphone Amplifier
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC28
封裝: 5 X 5 MM, 0.80 MM PITCH, MO-220WHHD-1, TQFN-28
文件頁數(shù): 20/36頁
文件大小: 956K
代理商: MAX9850ETI
M
where:
f
ICLK
= ICLK frequency. f
ICLK
must be at least 176 x
f
LRCLK
for proper DAC operation.
f
LRCLK
= LRCLK frequency.
N
MSB,LSB
= decimal value of MSB(14:8) and LSB(7:0)
(register 0x8, bits B6–B0 and register 0x9, bits B7–B0).
Round the results of the equation to the nearest integer
value.
For example:
f
LRCLK
= 44.1kHz, f
ICLK
= 12.288MHz.
1) Solve for N
MSB,LSB
, 15052.8.
2) Round result to nearest integer value. 15053.
3) Convert to hex, 0x3CD.
4) Program MSB(14:8) with the MSB 0x3A and program
LSB(7:0) with the LSB 0xCD).
Table 7 provides examples of using master noninteger
mode with various MCLK frequencies to generate useful
LRCLK frequencies.
Charge Pump
The DirectDrive line and headphone outputs of the
MAX9850 require a charge pump to create the internal
negative power supply. Set CPEN(1:0) = 11 in the
enable register (register 0x5, bits B5 and B4) to turn on
the charge pump. The negative charge-pump voltage
is established and the audio outputs are ready for use
approximately 1.4ms after CPEN is set to 11.
The state of CP(4:0), in the charge-pump register (register
0x7, bits B4–B0), determines whether the charge-pump
oscillator is derived from the internal 667kHz oscillator or
from MCLK. Set CPEN(1:0) = 11 and set CP(4:0) = 0x00
to enable the internal oscillator. The charge pump runs
independent from MCLK when the internal oscillator is
enabled allowing the charge pump to operate when the
DAC is disabled or when only the line inputs are used. No
MCLK is required when only the line inputs are used.
The switching frequency of the charge pump is well
beyond the audio range and does not interfere with audio
signals. The switch drivers utilize techniques that mini-
mize noise generated by turn-on and turn-off transients.
Although not typically required, additional high-frequency
noise attenuation can be achieved by increasing the size
of C2 and the PV
DD
bypass capacitor (see the
Functional
Diagram/Typical Operating Circuit)
.
Derive the charge-pump clock from MCLK by program-
ming CP(4:0) to a non-zero value based on the following
equation:
where:
f
MCLK
= MCLK frequency.
f
CP
= charge-pump clock frequency. Ensure f
CP
=
667kHz
±
20% for proper operation.
SF = MCLK scale factor. SF is the decimal value of
IC(1:0) + 1.
N
CP(4:0)
= rounded decimal value of CP(4:0) (register
0x7, bits B4–B0). N
CP(4:0)
must be greater than 1 when
deriving the charge-pump clock from I
CLK
.
N
f
f
SF
CP
MCLK
CP
( : )
4 0
×
×
2
=
Stereo Audio DAC with DirectDrive
Headphone Amplifier
20
______________________________________________________________________________________
Table 7. Master Noninteger N
MSB,LSB
Examples
N (15-BIT hex VALUE)
LRCLK OUTPUT FREQUENCY (kHz)
24
22.05
2AAB
2733
2E71
2AAB
3000
2C1A
1F75
1CE7
2000
1D66
20C5
1E1B
22D4
2000
2AAB
2733
2E71
2AAB
2E8C
2AC3
MCLK
(MHz)
SF
ICLK
(MHz)
48
5555
5CE1
44.1
4E66
5555
5833
39CE
3ACD
3C36
4000
4E66
5555
5587
32
16
12
1555
1738
1800
0FBB
1000
1062
116A
1555
1738
1746
11.03
139A
1555
160D
0E73
0EB3
0F0E
1000
139A
1555
1562
8
18.4320
16.9344
16.3840
12.5000
12.2880
12.0000
11.2896
9.2160
8.4672
8.4480
Note:
The N values represent the combined MSB(14:8) and LSB(7:0) values.
2
2
2
1
1
1
1
1
1
1
9.2160
8.4672
8.1920
12.5000
12.2880
12.0000
11.2896
9.2160
8.4672
8.4480
38E4
3DEB
4000
29F1
2AAB
2BB1
2E71
38E4
3DEB
3E10
1C72
1EF6
2000
14F9
1555
15D8
1738
1C72
1EF6
1F08
0E39
0F7B
1000
0A7C
0AAB
0AEC
0B9C
0E39
0F7B
0F84
3EEA
4000
4189
45A9
5555
5CE1
5D17
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