參數資料
型號: MAX1816ETM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: Replaced by TMS320VC5506 : Digital Signal Processors 144-LQFP
中文描述: DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CQCC48
封裝: 7 X 7 MM, 0.80 MM HEIGHT, THIN, QFN-48
文件頁數: 46/49頁
文件大?。?/td> 983K
代理商: MAX1816ETM
M
The MAX1816/MAX1994 can take full advantage of the
small size and low ESR of ceramic output capacitors in
a voltage-positioned circuit. The addition of the posi-
tioning resistor increases the ripple at FB, lowering the
effective ESR zero frequency of the ceramic output
capacitor.
Output overshoot (V
SOAR
) determines the minimum
output capacitance requirement (see the
Output
Capacitor Selection
section). Often the switching fre-
quency is increased to 550kHz or 1000kHz, and the
inductor value is reduced to minimize the energy trans-
ferred from inductor to capacitor during load-step
recovery. The efficiency penalty for operating at
550kHz is about 2% to 3% and about 5% at 1000kHz
when compared to the 300kHz voltage-positioned cir-
cuit, primarily due to the high-side MOSFET switching
losses.
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. The
switching power stage requires particular attention
(Figure 13). Refer to the MAX1816/MAX1994 EV kit data
sheet for a specific layout example.
If possible, mount all of the power components on the
top side of the board with their ground terminals flush
against one another. Follow these guidelines for good
PC board layout:
1) Isolate the power components on the top side from
the sensitive analog components on the bottom
side with a ground shield. Use a separate PGND
plane under the BUCK1 and BUCK2 sides (called
PGND1 and PGND2). Avoid the introduction of AC
currents into the PGND1 and PGND2 ground
planes.
2) Use a star ground connection on the power plane
to minimize the crosstalk between BUCK1 and
BUCK2.
3) Keep the high-current paths short, especially at the
ground terminals. This is essential for stable, jitter-
free operation.
4) Connect all analog grounds to a separate solid
copper plane, which connects to the AGND pin of
the MAX1816/MAX1994. This includes the V
CC
bypass capacitor, REF bypass capacitor, compen-
sation components, the TIME resistor, as well as
any other resistive dividers.
5) Tie AGND and PGND together close to the IC. Do
not connect them together anywhere else. Carefully
follow the grounding instructions in the
Layout
Procedure
.
6) In high-current master-slave applications, the mas-
ter controller should have a separate analog
ground. Return the appropriate noise-sensitive
components to this plane. Since the reference in
the master is sometimes connected to the slave, it
may be necessary to couple the analog ground in
the master to the analog ground in the slave to pre-
vent ground offsets. A low value (
10
) resistor is
sufficient to link the two grounds.
7) Keep the power traces and load connections short.
This is essential for high efficiency. The use of thick
copper PC boards (2oz vs. 1oz) can enhance full
load efficiency by 1% or more. Correctly routing PC
board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
8) Keep the high-current gate-driver traces (DL_, DH_,
LX_, and BST_) short and wide to minimize trace
resistance and inductance. This is essential for
high-power MOSFETs that require low-impedance
gate drivers to avoid shoot-through currents.
9) CS1+, CS1-, CS2, and AGND connections for cur-
rent limiting must be made using Kelvin-sense con-
nections to guarantee the current-limit accuracy.
Kelvin connections to LX2 and AGND must also be
made if the synchronous rectifier R
DS(ON)
of
BUCK2 is used for current limiting. With 8-pin SO
MOSFETs, this is best done by routing power to the
MOSFETs from the outside using the top copper
layer, while connecting GND and LX inside (under-
neath) the 8-pin SO package.
10) When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
11) Route high-speed switching nodes away from sen-
sitive analog areas (CC, REF, ILIM_). Make all pin-
strap control input connections (SKP_/
SDN
, ILIM_,
etc.) to analog ground or V
CC
rather than power
ground or V
DD
.
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
46
______________________________________________________________________________________
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