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參數(shù)資料
| 型號(hào)： | MAX16046 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers |
| 中文描述： | 12/8通道EEPROM可編程系統(tǒng)管理器，提供非易失故障寄存器 |
| 文件頁數(shù)： | 27/68頁 |
| 文件大?。?/td> | 570K |
| 代理商： | MAX16046 |
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M
Sequencing
Each EN_OUT_ has one or more associated MON_
inputs, facilitating the voltage monitoring of multiple
power supplies. To sequence a system of power sup-
plies safely, the output voltage of a power supply must
be good before the next power supply may turn on.
Connect EN_OUT_ outputs to the enable input of an
external power supply and connect MON_ inputs to the
output of the power supply for voltage monitoring. More
than one MON_ may be used if the power supply has
multiple outputs.
Sequence Order
The MAX16046/MAX16048 utilize a system of ordered
slots to sequence multiple power supplies. To deter-
mine the sequence order, assign each EN_OUT_ to a
slot ranging from Slot 0 to Slot 11. EN_OUT_(s)
assigned to Slot 0 are turned on first, followed by out-
puts assigned to Slot 1, and so on through Slot 11.
Multiple EN_OUT_s assigned to the same slot turn on at
the same time.
Each slot has a built-in configurable sequence delay
(registers r50h to r54h) ranging from 20μs to 1.6s.
During a reverse sequence, slots are turned off in
reverse order starting from Slot 11. The MAX16046/
MAX16048 may be configured to power-down in simul-
taneous mode or in reverse sequence mode as set in
r54h[4]. See Tables 10, 11, and 12 for the EN_OUT_
slot assignment bits, and Tables 13 and 14 for the
sequence delays.
Monitoring Inputs While Sequencing
An enabled MON_ input may be assigned to a slot
ranging from Slot 1 to Slot 12. Monitoring inputs are
always checked at the beginning of a slot. The inputs
are given the power-up fault delay within which they
must satisfy the programmed undervoltage limit; other-
wise a fault condition will occur. This undervoltage limit
cannot be disabled during power-up and power-down.
EN_OUT_s configured for open-drain, push-pull, or
charge-pump operation are always asserted at the end
of a slot, following the sequence delay. See Tables 10,
11, and 12 for the MON_ slot assignment bits.
Slot 0 does not monitor any MON_ input. Instead, Slot 0
waits for the
Software Enable
bit r4Dh[0] to be a logic
‘0’ and for the voltage on EN to rise above 0.525V
before asserting any assigned outputs. Outputs
assigned to Slot 0 are asserted before the Slot 0
sequence delay. Generally, Slot 0 controls the enable
inputs of power supplies that are first in the sequence.
Similarly, Slot 12 does not control any EN_OUT_ outputs.
Rather, Slot 12 monitors assigned MON_ inputs and then
enters the power-on state. Generally, Slot 12 monitors
the last power supplies in the sequence. The power-up
sequence is complete when any MON_ inputs assigned
to Slot 12 exceed their undervoltage thresholds and the
sequence delay is expired. If no MON_ inputs are
assigned to Slot 12, the power-up sequence is complete
after the slot sequence delay is expired.
The output rail(s) of a power supply should be monitored
by one or more MON_ inputs placed in the succeeding
slot, ensuring that the output of the supply is not checked
until it has first been turned on. For example, if a power
supply uses EN_OUT1 located in Slot 3 and has two
monitoring inputs, MON1 and MON2, they must both be
assigned to Slot 4. In this example, EN_OUT1 turns on at
the end of Slot 3. At the start of Slot 4, MON1 and MON2
must exceed the undervoltage threshold before the pro-
grammed power-up fault delay; otherwise a fault triggers.
MAX16046 fig03
20ms/div
V
CC
2V/div
0V
EN_OUT_
2V/div
0V
RESET
2V/div
0V
Figure 3.
RESET
and EN_OUT_ During Power-Up, EN_OUT_ Is
in Open-Drain Active-Low Configuration
MAX16046 fig04
10ms/div
V
CC
2V/div
EN_OUT_
2V/div
0V
0V
RESET
2V/div
0V
HIGH-Z
ASSERTED
LOW
UVLO
Figure 4.
RESET
and EN_OUT_ During Power-Up, EN_OUT_ Is
in Push-Pull Active-High Configuration
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
______________________________________________________________________________________
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX16046ACB+ | 功能描述:監(jiān)控電路 12Ch EEPROM Prob System Manager RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX16046ACB+T | 功能描述:監(jiān)控電路 12Ch EEPROM Prob System Manager RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX16046ATN+ | 功能描述:監(jiān)控電路 12Ch EEPROM Prob System Manager RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX16046ATN+T | 功能描述:監(jiān)控電路 12Ch EEPROM Prob System Manager RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX16046ECB+ | 功能描述:監(jiān)控電路 12Ch EEPROM Prob System Manager RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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