參數(shù)資料
型號(hào)： MAX148-MAX149
廠商： Maxim Integrated Products, Inc.
英文描述： +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
中文描述： 2.7V至5.25V，低功耗，8通道，串行10位ADC
文件頁(yè)數(shù)： 21/24頁(yè)
文件大小： 221K
代理商： MAX148-MAX149
High-S peed Digital Interfac ing with QS PI
The MAX148/MAX149 can interface with QSPI using
the circuit in Figure 20 (f
SCLK
= 2.0MHz, CPOL = 0,
CPHA = 0). This QSPI circuit can be programmed to do a
conversion on each of the eight channels. The result is
stored in memory without taxing the CPU, since QSPI
incorporates its own microsequencer.
The MAX148/MAX149 are QSPI compatible up to the
maximum external clock frequency of 2MHz.
T MS 320LC3x Interfac e
Figure 21 shows an application circuit to interface the
MAX148/MAX149 to the TMS320 in external clock mode.
The timing diagram for this interface circuit is shown in
Figure 22.
Use the following steps to initiate a conversion in the
MAX148/MAX149 and to read the results:
1)
The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
tied together with the MAX148/MAX149’s SCLK
input.
2)
The MAX148/MAX149’s
CS
pin is driven low by the
TMS320’s XF_ I/O port to enable data to be clocked
into the MAX148/MAX149’s DIN.
An 8-bit word (1XXXXX11) should be written to the
MAX148/MAX149 to initiate a conversion and place
the device into external clock mode. Refer to Table
1 to select the proper XXXXX bit values for your
specific application.
The MAX148/MAX149’s SSTRB output is monitored
via the TMS320’s FSR input. A falling edge on the
SSTRB output indicates that the conversion is in
progress and data is ready to be received from the
MAX148/MAX149.
The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 10 + 2-bit conversion result followed by
4 trailing bits, which should be ignored.
Pull
CS
high to disable the MAX148/MAX149 until
the next conversion is initiated.
3)
4)
5)
6)
M
+2.7V to +5.25V, Low-Power, 8-Channel,
S erial 10-Bit ADCs
______________________________________________________________________________________
21
CS
SCLK
DIN
SSTRB
DOUT
START
SEL2
SEL1
SEL0
UNI/BIP SGL/DIF
PD1
PD0
MSB
B8
S1
S0
HIGH
IMPEDANCE
HIGH
IMPEDANCE
Figure 22. TMS320 Serial-Interface Timing Diagram
相關(guān)PDF資料
PDF描述
MAX149 +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
MAX149BCAP +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
MAX149BEAP +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
MAX149BEPP +2.7V to +5.25V, Low-Power, 8-Channel, Serial 10-Bit ADCs
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