參數(shù)資料
型號(hào)： M95320-WDW6TG
廠商： NUMONYX
元件分類(lèi)： PROM
英文描述： 4K X 8 FLASH 2.7V PROM, PDSO8
封裝： 0.169 INCH, ROHS COMPLIANT, TSSOP-8
文件頁(yè)數(shù)： 44/45頁(yè)
文件大?。?/td> 440K
代理商： M95320-WDW6TG
Signal description
M95320, M95640, M95320-x, M95640-x
2
Signal description
During all operations, VCC must be held stable and within the specified valid range:
VCC(min) to VCC(max).
All of the input and output signals must be held High or Low (according to voltages of VIH,
VOH, VIL or VOL, as specified in Table 13 to Table 17). These signals are described next.
2.0.1
Serial Data Output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (C).
2.0.2
Serial Data Input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be written. Values are latched on the rising edge of Serial Clock
(C).
2.0.3
Serial Clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data Output (Q) changes after the falling edge of Serial Clock (C).
2.0.4
Chip Select (S)
When this input signal is High, the device is deselected and Serial Data Output (Q) is at high
impedance. Unless an internal Write cycle is in progress, the device will be in the Standby
Power mode. Driving Chip Select (S) Low selects the device, placing it in the Active Power
mode.
After Power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
2.0.5
Hold (HOLD)
The Hold (HOLD) signal is used to pause any serial communications with the device without
deselecting the device.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To start the Hold condition, the device must be selected, with Chip Select (S) driven Low.
2.0.6
Write Protect (W)
The main purpose of this input signal is to freeze the size of the area of memory that is
protected against Write instructions (as specified by the values in the BP1 and BP0 bits of
the Status Register).
This pin must be driven either High or Low, and must be stable during all write operations.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M95320-WDW6TG/P 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock
M95320-WDW6TG/PC 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock
M95320WDW6TP 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Kbit and 64 Kbit serial SPI bus EEPROMs with high-speed clock
M95320-WDW6TP 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5 V to 5.5V 32k RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8
M95320-WDW6TP/P 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock
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