
CHAPTER 6 CLOCK GENERATOR
User’s Manual U17260EJ6V0UD
164
Note The setting of <1> is not necessary when the internal high-speed oscillation clock or high-
speed system clock is already operating.
<2> Selecting the clock supplied as the main system clock and peripheral hardware clock (MCM register)
Set the main system clock and peripheral hardware clock using XSEL and MCM0.
Selection of Main System Clock and Clock Supplied to Peripheral Hardware
XSEL
MCM0
Main System Clock (fXP)
Peripheral Hardware Clock (fPRS)
0
1
Internal high-speed oscillation clock
(fRH)
1
0
Internal high-speed oscillation clock
(fRH)
High-speed system clock (fXH)
<3> Selecting the CPU clock division ratio (PCC register)
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock
division ratio, use PCC0, PCC1, and PCC2.
PCC2
PCC1
PCC0
CPU Clock (fCPU) Selection
0
fXP
0
1
fXP/2 (default)
0
1
0
fXP/2
2
0
1
fXP/2
3
1
0
fXP/2
4
0
Other than above
Setting prohibited
(3) Example of setting procedure when stopping the internal high-speed oscillation clock
The internal high-speed oscillation clock can be stopped in the following two ways.
Executing the STOP instruction to set the STOP mode
Setting RSTOP to 1 and stopping the internal high-speed oscillation clock
(a) To execute a STOP instruction
<1> Setting of peripheral hardware
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 21 STANDBY FUNCTION).
<2> Setting the X1 clock oscillation stabilization time after standby release
When the CPU is operating on the X1 clock, set the value of the OSTS register before the STOP
instruction is executed.
<3> Executing the STOP instruction
When the STOP instruction is executed, the system is placed in the STOP mode and internal high-
speed oscillation clock is stopped.