
User’s Manual U15075EJ1V0UM00
19
LIST OF FIGURES (3/5)
Figure No.
Title
Page
7-16
Timing of Interval Timer Operation with 16-Bit Resolution .......................................................................... 155
7-17
Timing of External Event Counter Operation with 16-Bit Resolution........................................................... 157
7-18
Timing of Square-Wave Output with 16-Bit Resolution ............................................................................... 159
7-19
Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M
> N)) ........................................ 161
7-20
Timing of Carrier Generator Operation (When CR60 = N, CRH60 = M (M
< N),
Phases of Carrier Clock and NRZ60 Are Asynchronous) ........................................................................... 162
7-21
Timing of Carrier Generator Operation (When CR60 = CRH60 = N) .......................................................... 163
7-22
Operation Timing in PWM Free-Running Mode (When Rising Edge Is Selected) ...................................... 165
7-23
Operation Timing When Overwriting CR50 (When Rising Edge Is Selected) ............................................. 165
7-24
Operation Timing in PWM Free-Running Mode (When Both Edges Are Selected) .................................... 166
7-25
Operation Timing in PWM Free-Running Mode (When Both Edges Are Selected)
(When CR50 Is Overwritten) ....................................................................................................................... 167
7-26
PWM Pulse Generator Mode Timing (Basic Operation).............................................................................. 169
7-27
PWM Output Mode Timing (When CR60 and CRH60 Are Overwritten)...................................................... 169
7-28
Start Timing of 8-Bit Timer Counter............................................................................................................. 170
7-29
Timing of Operation as External Event Counter (8-Bit Resolution) ............................................................. 170
8-1
Block Diagram of Watch Timer.................................................................................................................... 171
8-2
Format of Watch Timer Mode Control Register........................................................................................... 173
8-3
Watch Timer/Interval Timer Operation Timing ............................................................................................ 175
9-1
Block Diagram of Watchdog Timer.............................................................................................................. 178
9-2
Format of Watchdog Timer Clock Select Register ...................................................................................... 179
9-3
Format of Watchdog Timer Mode Register ................................................................................................. 180
10-1
Block Diagram of 8-Bit A/D Converter......................................................................................................... 184
10-2
Format of A/D Converter Mode Register 0 .................................................................................................. 186
10-3
Format of Analog Input Channel Specification Register 0........................................................................... 187
10-4
Basic Operation of 8-Bit A/D Converter....................................................................................................... 189
10-5
Relationship Between Analog Input Voltage and A/D Conversion Result................................................... 190
10-6
Software-Started A/D Conversion ............................................................................................................... 191
10-7
How to Reduce Current Consumption in Standby Mode............................................................................. 192
10-8
Conversion Result Read Timing (If Conversion Result Is Undefined)......................................................... 193
10-9
Conversion Result Read Timing (If Conversion Result Is Normal) ............................................................. 193
10-10
Analog Input Pin Treatment......................................................................................................................... 194
10-11
A/D Conversion End Interrupt Request Generation Timing ........................................................................ 195
10-12
AVDD Pin Handling....................................................................................................................................... 195
11-1
Block Diagram of 10-Bit A/D Converter....................................................................................................... 198
11-2
Format of A/D Converter Mode Register 0 .................................................................................................. 200
11-3
Format of Analog Input Channel Specification Register 0........................................................................... 201
11-4
Basic Operation of 10-Bit A/D Converter..................................................................................................... 203