
7532/7536 Group User’s Manual
APPLICATION
2-5
2.1 I/O port
Fig. 2.1.7 Structure of Interrupt request register 1
CNTR
0
or AD converter
interrupt request bit
Nothing is allocated for this bit. This is a write disabled bit.
When this bit is read out, the value is “0”.
8
:
These bits can be cleared to “0” by program, but cannot be set.
Notes 1:
7532 Group, 36-pin version and 32-pin version: INT
1
interrupt does not exist.
2:
7532 Group, 32-pin version: INT
0
interrupt does not exist.
This is a write disabled bit. When this bit is read out, the value is “0”.
Interrupt request register 1
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
1
2
3
4
5
6
7
Name
0
0
0
0
0
0
0
Interrupt request register 1 (IREQ1) [Address : 3C
16
]
UART receive/USBIN token
interrupt request bit
UART transmit/USBSETUP/
OUT token/Reset/Suspend/
Resume/INT
1
interrupt
request bit (
Note 1
)
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Timer 2 or serial I/O2 interrupt
request bit
INT
0
interrupt request bit
(
Note 2
)
Timer X or key-on wake up
interrupt request bit
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
Timer 1 interrupt request bit
8
8
8
8
8
8
8
Interrupt control register 1
b7 b6 b5 b4 b3 b2 b1 b0
B
0
Function
At reset
R W
0
1
2
3
4
5
6
7
Name
0
0
0
0
0
0
0
Interrupt control register 1 (ICON1) [Address : 3E
16
]
Nothing is allocated for this bit. Do not write “1” to this bit.
When this bit is read out, the value is “0”.
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
Timer 2 or serial I/O2 interrupt
enable bit
CNTR
0
or AD converter
interrupt enable bit
INT
0
interrupt enable bit
(
Note 2
)
Timer X or key-on wake up
interrupt enable bit
Timer 1 interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
UART receive/USBIN token
interrupt enable bit
UART transmit/USBSETUP/
OUT token/Reset/Suspend/
Resume/INT
1
interrupt enable
bit (
Note 1
)
Notes 1:
7532 Group, 36-pin version and 32-pin version: INT
1
interrupt does not exist.
2:
7532 Group, 32-pin version: INT
0
interrupt does not exist.
This is a write disabled bit. When this bit is read out, the value is “0”.
Fig. 2.1.8 Structure of Interrupt control register 1