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參數(shù)資料
| 型號： | M5M5T5636UG-22 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM |
| 中文描述： | 18874368位（524288 - Word的36位）網(wǎng)絡(luò)的SRAM |
| 文件頁數(shù)： | 9/23頁 |
| 文件大小： | 287K |
| 代理商： | M5M5T5636UG-22 |
MITSUBISHI LSIs
M5M5T5636UG – 25,22,20
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
9
MITSUBISHI
ELECTRIC
Advanced Information
M5M5T5636UG REV.0.1
CAPACITANCE
Limits
Typ
Symbol
Parameter
Conditions
Min
Max
6
8
Unit
C
I
C
O
Note19.This parameter is sampled.
Input Capacitance
Input / Output(DQ) Capacitance
V
I
=GND, V
I
=25mVrms, f=1MHz
V
O
=GND, V
O
=25mVrms, f=1MHz
pF
pF
THERMAL RESISTANCE
Limits
Typ
TBD
TBD
Symbol
Parameter
Conditions
Min
Max
Unit
θ
JA
θ
JC
Note20.This parameter is sampled.
Thermal Resistance Junction Ambient
Thermal Resistance Junction to Case
TBD
TBD
°C/W
°C/W
AC ELECTRICAL CHARACTERISTICS
(Ta=0~70°C, V
DD
=2.375~2.625V, unless otherwise noted)
(1)MEASUREMENT CONDITION
Input pulse levels ········································ V
IH
=V
DDQ
, V
IL
=0V
Input rise and fall times ······························· faster than or equal to 1V/ns
Input timing reference levels ······················· V
IH
=V
IL
=0.5*V
DDQ
Output reference levels ·······························V
IH
=V
IL
=0.5*V
DDQ
Output load ·················································· Fig.1
Note21.Valid Delay Measurement is made from the V
DDQ
/2 on the input waveform to the V
DDQ
/2 on the output waveform.
Input waveform should have a slew rate of
faster than or equal to
1V/ns.
Note22.Tri-state toff measurement is made from the V
DDQ
/2 on the input waveform to the output waveform moving 20%
from its initial to final Value V
DDQ
/2.
Note:the initial value is not V
OL
or V
OH
as specified in DC ELECTRICAL CHARACTERISTICS table.
Note23. Tri-state ton measurement is made from the V
DDQ
/2 on the input waveform to the output waveform moving 20%
from its initial Value V
DDQ
/2 to its final Value.
Note:the final value is not V
OL
or V
OH
as specified in DC ELECTRICAL CHARACTERISTICS table.
Note24.Clocks,Data,Address and control signals will be tested with a minimum input slew rate of
faster than or equal to
1V/ns.
Z
O
=50
50
Q
V
T
=0.5*V
DDQ
30pF
(Including wiring and JIG)
Fig.1 Output load
V
DDQ
/ 2
V
DDQ
/ 2
t
plh
t
phl
Input
Waveform
Output
Waveform
V
DDQ
/ 2
Input
Waveform
Vh-(0.2(Vh-Vz))
Vz+(0.2(Vh-Vz))
0.2(Vz-Vl)
Vz-(0.2(Vz-Vl))
toff
ton
Vz
(toff)
(ton)
Vh
Vl
Output
Waveform
Fig.2 Tdly measurement
Fig.3 Tri-State measurement
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| M5M5T5636UG-25 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:MITSUBISHI LSIs 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM |
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| M5M5T5672TG-22 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
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