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參數(shù)資料
| 型號： | M5M5T5636UG-22 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM |
| 中文描述： | 18874368位（524288 - Word的36位）網(wǎng)絡(luò)的SRAM |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 287K |
| 代理商： | M5M5T5636UG-22 |
MITSUBISHI LSIs
M5M5T5636UG – 25,22,20
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
17
MITSUBISHI
ELECTRIC
Advanced Information
M5M5T5636UG REV.0.1
EXTEST
EXTEST is an IEEE 1149.1 mandatory public instruction. It is to be executed whenever the Instruction Register is loaded with all logic 0s.
EXTEST is not implemented in the TAP Controller, and therefore this device is not compliant to the 1149.1 Standard. When the EXTEST
instruction is loaded into the Instruction Register, the device responds as if the SAMPLE/PRELOAD instruction has been loaded. There is
one difference between the two instructions. Unlike the SAMPLE/PRELOAD instruction, EXTEST place the SRAM outputs in a High-Z
state.
IDCODE
The IDCODE instruction cause the ID ROM to be loaded into the ID register when the controller is in the Capture-DR state and places the
ID Register between the TDI and TDO pins in the Shift-DR state. The IDCODE instruction is the default instruction loaded in at power-up
and any time the controller is placed in the Test-Logic-Reset state.
SAMPLE-Z
If the SAMPLE-Z instruction is loaded in the Instruction Register, all SRAM outputs are forced to an inactive drive state (High-Z) and the
Boundary Scan Register is placed between the TDI and TDO pins when the TAP Controller is moved to the Shift-DR state.
RFU
These instructions are reserved for future use. Do not use these instructions.
JTAG TAP BLOCK DIAGRAM
BOUNDARY SCAN ORDER
TBD
31 30 29
. . . .
. .
2 1 0
. .
2 1 0
0
. . . . . . . . . . . . . .
. .
2 1 0
. .
Boundary Scan Register
Identification Register
Instruction Register
Bypass Register
TDO
TDI
Test Access Port (TAP) Controller
TMS
TCK
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M5T5636UG-25 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:MITSUBISHI LSIs 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM |
| M5M5T5672TG | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
| M5M5T5672TG-20 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
| M5M5T5672TG-22 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
| M5M5T5672TG-25 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM |
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