參數(shù)資料
型號(hào): M37905M4C-XXXSP
廠商: Mitsubishi Electric Corporation
英文描述: 16 BIT CMOS MICROCOMPUTER
中文描述: 16位CMOS微機(jī)
文件頁數(shù): 19/102頁
文件大?。?/td> 881K
代理商: M37905M4C-XXXSP
19
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 9 Bus cycle waveform at access to internal area
1 bus cycle = 3
φ
(Note)
(Internal ROM bus cycle select bit = 0)
ROM
RAM
SFR
Internal address bus
Internal data bus,
Internal code bus
φ
BIU
Address
1 bus cycle = 2
φ
φ
BIU
Internal address bus
Internal data bus
Internal code bus
Address
1 bus cycle = 2
φ
1 bus cycle = 2
φ
(Internal ROM bus cycle select bit = 1)
φ
BIU
Internal address bus
Internal data bus,
Internal code bus
Address
Data
1 bus cycle = 3
φ
Data
Data
Note:
When reprogramming the internal flash memory in the CPU reprogramming mode, select the bus cycle = 3
φ
.
G
Number of bus cycles
Figure 9 shows the bus cycle waveform at access to the internal
area. Bit 7 of the processor mode register 1 (address 5F
16
), which is
shown in Figure 10, selects the number of bus cycles for the internal
ROM: 3
φ
or 2
φ
. (This bit 7 is the internal ROM bus cycle select bit.)
The internal RAM, SFRs (internal peripheral devices’ control regis-
ters) are always accessed with 1 bus cycle = 2
φ
.
Fig. 10 Bit configuration of processor mode register 1
7
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Processor mode register 1
Fix these bits to “0000000
2
”.
Address
5F
16
Internal ROM bus cycle select bit
0 : 1 bus cycle = 3
φ
1 : 1 bus cycle = 2
φ
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