![](http://datasheet.mmic.net.cn/280000/M37905M4C_datasheet_16084068/M37905M4C_44.png)
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
44
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PULSE OUTPUT PORT MODE 0
Figure 48 shows the block diagram in the pulse output port mode 0.
This mode has an 8-bit pulse output port. The waveform output se-
lect bits (bits 0 to 2) of waveform output mode register (address
A6
16
) select use of pulse output port. The 8-bit pulse output port can
also be divided into “4 bits and 4 bits” or “6 bits and 2 bits”, with the
pulse output mode select bit (bit 3) of waveform output mode regis-
ter (address A6
16
); each of them can be individually controlled.
Set timers A3 and A0 to the timer mode because they are used in the
pulse output port mode 0. Figure 50 shows the bit configuration of
timer A3 and A0 mode registers in the pulse output port mode 0.
Timers A3 and A0 start count when setting the corresponding timer
count start bit to “1”, and they stop it when clearing that bit to “0”.
Fig. 48 Block diagram in pulse output port mode 0
Each bit using timer A0 as a trigger can also be controlled by an in-
put trigger from pin RTP
TRG0
. This control is selected by the pulse
output trigger select bits of the three-phase output data register 0
(bits 7 and 6 at address A8
16
). Also, this externally-input trigger can
be selected from the following three types: falling edges, rising
edges, and falling and rising edges.
The reversed content of the pulse output data bit can be output to
each pulse output port by the pulse output polarity select bit of the
three-phase output data register 1 (bit 3 at address A9
16
). When the
pulse output polarity select bit = “0”, the content of the pulse output
data bit is output as it is; when the pulse output polarity select bit =
“1”, the reversed content is output.
b0
b1
b2
b0
b1
b2
b3
b4
b5
RTP1
0
RTP1
1
RTP0
3
D Q
D Q
D Q
D Q
D Q
DT
RTP0
1
RTP0
2
D Q
R
DT
D Q
D Q
R
RTP0
0
DT
b6
b7
D Q
D Q
T
RTP1
2
RTP1
3
P6OUT
CUT
Pulse output polarity
select bit
(bit 3 at address A9
16
)
Waveform output
control bit 0
(bit 6 at address A6
16
)
Reset
Pulse width
modulation
circuit
Pulse output trigger select bits
(bits 7, 6 at address A8
16
)
Pulsoutput of timer A1
Pulse width modulation timer select bits
(bits 5, 4 at address A6
16
)
Pulsoutput of timer A2
Pulsoutput of timer A4
Timer A3
Pulse width modulation enable bits
0 through 2
(bits 0 through 2 at address A9
16
)
Timer A0
RTP
TRG1
Bits 0 through 3 of three-
phase output data register 0
(address A8
16
)
Bits 4, 5 of three-phase output data register 0
(address A8
or
Bits 4, 5 of three-phase output data register 1
(address A9
16
)
16
)
Bits 6, 7 of three-phase output data
register 1 (address A9
16
)
D
Pulse output mode
select bit
(bit 3 at address A6
16
)
D
Waveform output control bit 1
(bit 7 at address A6
16
)
Reset