參數(shù)資料
型號(hào)： M37905M4C-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： 16 BIT CMOS MICROCOMPUTER
中文描述： 16位CMOS微機(jī)
文件頁(yè)數(shù)： 36/102頁(yè)
文件大小： 881K
代理商： M37905M4C-XXXFP
36
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(2) Event counter mode [01]
Figure 37 shows the bit configuration of the timer Bi mode register in
the event counter mode. In event counter mode, bit 0 in the timer Bi
mode register must be “1” and bit 1 must be “0”.
The input signal from the TBi
IN
pin is counted when the count start
bit is “1” and counting is stopped when it is “0”.
Count is performed at the fall of the input signal when bits 2 and 3
are “0” and at the rise of the input signal when bit 3 is “0” and bit 2 is
“1”.
When bit 3 is “1” and bit 2 is “0”, count is performed at the rise and
fall of the input signal.
Only for timer B2, when the timer B2 clock source select bit of the
particular function select register 1 (bit 6 at address 63
16
) = “1” in the
event counter mode, fx
32
can be selected. (When this bit is “0”, an
input signal from pin TB2
IN
becomes the count source as described
above.) For the bit configuration of the particular function select reg-
ister 1, refer to the section on the standby function.
Also, the pin position where pin TBi
IN
is to be allocated can be se-
lected by the pin TBi
IN
select bit (bit 0, 1, or 2 at address AE
16
; the
port P2 pin function control register).
(3) Pulse period measurement/Pulse width
measurement mode [10]
Figure 38 shows the bit configuration of the timer Bi mode register in
the pulse period measurement/pulse width measurement mode.
In the pulse period measurement/pulse width measurement mode,
bit 0 must be “0” and bit 1 must be “1”. Bits 6 and 7 are used to select
the clock source. The selected clock is counted when the count start
bit is “1” and counting stops when it is “0”.
The pulse period measurement mode is selected when bit 3 is “0”. In
the pulse period measurement mode, the selected clock is counted
during the interval starting at the fall of the input signal from the TBi
IN
pin to the next fall or at the rise of the input signal to the next rise; the
result is stored in the reload register. In this case, the reload register
acts as a buffer register.
When bit 2 is “0”, the clock is counted from the fall of the input signal
to the next fall. When bit 2 is “1”, the clock is counted from the rise of
the input signal to the next rise.
In the case of counting from the fall of the input signal to the next fall,
counting is performed as follows. As shown in Figure 39, when the
fall of the input signal from TBi
IN
pin is detected, the contents of the
counter is transferred to the reload register. Next, the counter is
cleared and count is started from the next clock. When the fall of the
next input signal is detected, the contents of the counter is trans-
ferred to the reload register once more, the counter is cleared, and
the count is started. The period from the fall of the input signal to the
next fall is measured in this way.
After the contents of the counter is transferred to the reload register,
an interrupt request signal is generated and the interrupt request bit
in the timer Bi interrupt control register is set. However, no interrupt
request signal is generated when the contents of the counter is trans-
ferred first to the reload register after the count start bit is set to “1”.
When bit 3 is “1”, the pulse width measurement mode is selected.
The pulse width measurement mode is the same as the pulse period
measurement mode except that the clock is counted from the fall of
the TBi
IN
pin input signal to the next rise or from the rise of the input
signal to the next fall as shown in Figure 40.
Fig. 36 Bit configuration of timer Bi mode register in timer mode
Fig. 37 Bit configuration of timer Bi mode register in event counter mode
Fig. 38 Bit configuration of timer Bi mode register in pulse period
measurement/pulse width measurement mode
0 0 : Always
“
00
”
in timer mode
× × ×
: Not used in timer mode and
may be any
Not used in timer mode
Clock source select bits
0 0 : Select f
2
0 1 : Select f
16
1 0 : Select f
64
1 1 : Select f
512
7 6 5 4 3 2 1 0
×
×
0
0
×
×
Timer B0 mode register
Timer B1 mode register
Timer B2 mode register
Address
5B
16
5C
16
5D
16
0 1 : Always
“
01
”
in event counter
mode
0 0 : Count at the falling edge of
input signal
0 1 : Count at the rising edge of
input signal
1 0 : Count at the both falling edge
and rising edge of input signal
× × × ×
: Not used in event counter mode
7 6 5 4 3 2 1 0
×
×
×
×
1
0
Timer B0 mode register
Timer B1 mode register
Timer B2 mode register
Address
5B
16
5C
16
5D
16
1 0 : Always
“
10
”
in pulse period
measurement/pulse width
measurement mode
0 0 : Count from the falling edge of
input signal to the next falling one
0 1 : Count from the rising edge of
input signal to the next rising one
1 0 : Count from the falling edge of
input signal to the next rising one
and from the rising edge to the
next falling one
Conut-type select bit
0 : Counter-clear type
1 : Free-run type
Timer Bi overflow flag
Clock source select bits
0 0 : Select f
2
0 1 : Select f
16
1 0 : Select f
64
1 1 : Select f
512
7 6 5 4 3 2 1 0
0
1
Timer B0 mode register
Timer B1 mode register
Timer B2 mode register
Address
5B
16
5C
16
5D
16
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PDF描述
M37905M4C-XXXSP 16 BIT CMOS MICROCOMPUTER
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參數(shù)描述
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