參數(shù)資料
型號: M37736EHL
廠商: Mitsubishi Electric Corporation
英文描述: PROM VERSION OF M37736MHLXXXHP(MICROCOMPUTERS)
中文描述: PROM的版本M37736MHLXXXHP(微型)
文件頁數(shù): 80/96頁
文件大?。?/td> 1328K
代理商: M37736EHL
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37736MHBXXXGP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
80
[External bus mode B]
Memory expansion mode and microprocessor mode
Bus timing data formulas
(V
CC
= 5 V ± 10%, V
SS
= 0 V, Ta = –20 to 85 °C, f(X
IN
) = 25 MHz (Max., Note1), unless otherwise noted)
45
5
18
Limits
Wait mode
No wait
Wait 1
Min.
Max.
Symbol
Parameter
Unit
1
10
9
2 · f(f
2
)
3
10
9
2 · f(f
2
)
ns
ns
Wait 0
t
d(CS–WE)
t
d(CS–RDE)
t
h(WE–CS)
t
h(RDE–CS)
t
d(An–WE)
t
d(An–RDE)
t
d(A–WE)
t
d(A–RDE)
t
h(WE–An)
t
h(RDE–An)
t
w(ALE)
t
su(A–ALE)
t
h(ALE–A)
t
d(ALE–WE)
t
d(ALE–RDE)
t
d(WE–DQ)
t
h(WE–DQ)
t
w(WE)
t
pxz(RDE–DZ)
t
pzx(RDE–DZ)
t
w(RDE)
t
d(RSMP–WE)
t
d(RSMP–RDE)
t
h(
1
–RSMP)
t
d(WE–
t
d(RDE–
1
)
1
)
ns
4
1
10
9
2 · f(f
2
)
3
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
3
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
2
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
2
10
9
2 · f(f
2
)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
No wait
Wait 1
Wait 0
1
10
9
2 · f(f
2
)
ns
ns
ns
ns
ns
ns
9
4
1
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
2
10
9
2 · f(f
2
)
4
10
9
2 · f(f
2
)
ns
ns
1
10
9
2 · f(f
2
)
2
10
9
2 · f(f
2
)
4
10
9
2 · f(f
2
)
1
10
9
2 · f(f
2
)
ns
ns
ns
ns
ns
ns
0
0
Chip-select output delay time
Chip-select hold time
Address output delay time
Address output delay time
Address hold time
ALE pulse width
Address output setup time
Address hold time
ALE output delay time
Data output delay time
Data hold time
___ ___
WEL
WEH
pulse width
Floating start delay time
Floating release delay time
___
RDE
pulse width
____
RSMP
output delay time
____
RSMP
hold time
1
output delay time
– 28
– 33
– 28
– 45
– 22
– 18
– 23
– 35
– 35
– 25
– 30
– 22
– 30
– 30
– 20
– 32
– 32
– 30
– 28
– 33
Notes 1.
This applies when the main-clock division selection bit = “0”.
2.
f(f
2
) represents the clock f
2
frequency.
For the relation to the main clock and sub clock, refer to Table 10.
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