參數(shù)資料
型號: M37280MFH-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64
文件頁數(shù): 149/172頁
文件大?。?/td> 2033K
代理商: M37280MFH-XXXSP
77
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37280MFH–XXXSP, M37280MKH–XXXSP
M37280EKSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
The horizontal position is common to all blocks, and can be set in
256 steps (where 1 step is 4TOSC, TOSC being the oscillating cycle
for display) as values “0016” to “FF16” in bits 0 to 7 of the horizontal
position register (address 00CF16). The horizontal position register
is shown in Figure 8.11.12.
Fig. 8.11.12 Horizontal Position Register
b7 b6 b5 b4 b3 b2 b1 b0
Horizontal position register (HP) [Address 00CF16]
B
Name
Functions
After reset RW
Horizontal Position Register
Control bits of horizontal
display start positions
(HP0 to HP7)
Horizontal display start positions
4TOSC
(setting value of high-order 4 bits 161
+setting value of low-order 4 bits 160 )
0R W
0
to
7
Notes 1. The setting value synchronizes with the VSYNC.
2. TOSC = OSD oscillation period.
Note : 1TC (TC : OSD clock cycle divided in pre-divide circuit) gap occurs be-
tween the horizontal display start position set by the horizontal position
register and the most left dot of the 1st block. Accordingly, when 2 blocks
have different pre-divide ratios, their horizontal display start position
will not match.
Ordinaly, this gap is 1TC regardless of character sizes, however, the
gap is 1.5TC only when the character size is 1.5TC.
Fig. 8.11.13 Notes on Horizontal Display Start Position
HSYNC
1TC
Block 1 (Pre-divide ratio = 1)
1TC
4TOSC N
Note 1
Block 2 (Pre-divide ratio = 2)
Block 3 (Pre-divide ratio = 3)
Block 4 (Pre-divide ratio = 2, character size = 1.5Tc)
1.5TC
: Value of horizontal position register (decimal notation)
: OSD clock cycle divided in pre-divide circuit
: OSD oscillation cycle
: 50 Tosc
N
Tc
Tosc
Tdef
Tdef
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