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| 型號： | M34554MC-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 90/137頁 |
| 文件大小： | 1606K |
| 代理商： | M34554MC-XXXFP |
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56
4554 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(6) Return signal
An external wakeup signal or timer 5 interrupt request flag (T5F) is
used to return from the clock operating mode.
An external wakeup signal is used to return from the RAM back-up
mode because the oscillation is stopped.
Table 16 shows the return condition for each return source.
(7) Control registers
Key-on wakeup control register K0
Register K0 controls the port P0 key-on wakeup function. Set the
contents of this register through register A with the TK0A instruc-
tion. In addition, the TAK0 instruction can be used to transfer the
contents of register K0 to register A.
Key-on wakeup control register K1
Register K1 controls the port P1 key-on wakeup function. Set the
contents of this register through register A with the TK1A instruc-
tion. In addition, the TAK1 instruction can be used to transfer the
contents of register K0 to register A.
Key-on wakeup control register K2
Register K2 controls the INT0 and INT1 pin key-on wakeup func-
tion. Set the contents of this register through register A with the
TK2A instruction. In addition, the TAK2 instruction can be used to
transfer the contents of register K2 to register A.
Table 16 Return source and return condition
Remarks
Return condition
External
wakeup
signal
Return source
Ports P00–P03
Ports P10–P13
INT0 pin
INT1 pin
Pull-up control register PU0
Register PU0 controls the ON/OFF of the port P0 pull-up transis-
tor. Set the contents of this register through register A with the
TPU0A instruction. In addition, the TAPU0 instruction can be
used to transfer the contents of register PU0 to register A.
Pull-up control register PU1
Register PU1 controls the ON/OFF of the port P1 pull-up transis-
tor. Set the contents of this register through register A with the
TPU1A instruction. In addition, the TAPU1 instruction can be
used to transfer the contents of register PU1 to register A.
External interrupt control register I1
Register I1 controls the valid waveform of the external 0 inter-
rupt, the input control of INT0 pin and the return input level. Set
the contents of this register through register A with the TI1A in-
struction. In addition, the TAI1 instruction can be used to transfer
the contents of register I1 to register A.
External interrupt control register I2
Register I2 controls the valid waveform of the external 1 inter-
rupt, the input control of INT1 pin and the return input level. Set
the contents of this register through register A with the TI2A in-
struction. In addition, the TAI2 instruction can be used to transfer
the contents of register I2 to register A.
Return by an external “L” level in-
put.
Return by an external “H” level or
“L” level input, or rising edge
( “ L ”
→ “ H ” ) or falling edge
(“H”
→“L”).
When the return level is input, the
interrupt request flag (EXF0,
EXF1) is not set.
Return by timer 5 underflow or by
setting T5F to “1”.
It can be used in the clock operat-
ing mode.
The key-on wakeup function can be selected by one port unit. Set the port
using the key-on wakeup function to “H” level before going into the power
down state.
Select the return level (“L” level or “H” level) with register I1 (I2) and return
condition (return by level or edge) with register K2 according to the external
state before going into the power down state.
Clear T5F with the SNZT5 instruction before system enters into the power
down state.
When system enters into the power down state while T5F is “1”, system re-
turns from the state immediately because it is recognized as return condition.
Timer 5 interrupt
request flag (T5F)
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