參數資料
型號： M34554MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數： 116/137頁
文件大?。?/td> 1606K
代理商： M34554MC-XXXFP
8
4554 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
CONNECTIONS OF UNUSED PINS
Connection
Connect to VSS.
Open.
Connect to VSS.
Open.
Connect to VSS.
Open.
Connect to VSS.
Open.
Connect to VSS.
Open.
Connect to VSS.
Open.
Connect to Vss.
Open.
Connect to Vss.
Open.
Connect to Vss.
Open.
Connect to Vss.
Open.
Pin
XIN
XOUT
XCIN
XCOUT
D0–D6
D7/CNTR0
D8/INT0
D9/INT1
C/CNTR1
P00–P03
P10–P13
SEG31/P20–
SEG28/P23
SEG27/P30–
SEG24/P33
COM0–COM3
SEG0/VLC3
SEG1/VLC2
SEG2/VLC1
SEG3–SEG23
Usage condition
Internal oscillator is selected (CMCK and CRCK instructions are not executed.)
(Note 1)
Sub-clock input is selected for system clock (MR0=1). (Note 2)
Internal oscillator is selected (CMCK and CRCK instructions are not executed.)
(Note 1)
RC oscillator is selected (CRCK instruction is executed)
External clock input is selected for main clock (CMCK instruction is executed).
(Note 3)
Sub-clock input is selected for system clock (MR0=1). (Note 2)
Sub-clock is not used.
External clock input is selected for sub-clock.
(Note 4)
N-channel open-drain is selected for the output structure.
CNTR0 input is not selected for timer 1 count source.
N-channel open-drain is selected for the output structure.
“0” is set to output latch.
CNTR1 input is not selected for timer 3 count source.
The key-on wakeup function is not selected. (Note 4)
N-channel open-drain is selected for the output structure. (Note 5)
The pull-up function is not selected. (Note 4)
The key-on wakeup function is not selected. (Note 4)
N-channel open-drain is selected for the output structure. (Note 5)
The pull-up function is not selected. (Note 4)
The key-on wakeup function is not selected. (Note 4)
Ports P20–P23 selected.
Ports P30–P33 selected.
SEG0 pin is selected.
SEG1 pin is selected.
SEG2 pin is selected.
Notes 1: When the CMCK and CRCK instructions are not executed, the internal oscillation (ring oscillator) is selected for main clock.
2: When sub-clock (XCIN) input is selected (MR0 = 1) for the system clock by setting “1” to bit 1 (MR1) of clock control register MR, main clock is stopped.
3: Select the ceramic resonance by executing the CMCK instruction to use the external clock input for the main clock.
4: Be sure to select the output structure of ports D0–D6 and the pull-up function and key-on wakeup function of P00–P03 and P10–P13 with every one
port. Set the corresponding bits of registers for each port.
5: Be sure to select the output structure of ports P00–P03 and P10–P13 with every two ports. If only one of the two pins is used, leave another one open.
(Note when connecting to VSS and VDD)
q Connect the unused pins to VSS and VDD using the thickest wire at the shortest distance against noise.
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