參數(shù)資料
型號： M34524MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù)： 138/163頁
文件大小： 1235K
代理商： M34524MC-XXXFP
Rev.2.00
Jul 27, 2004
page 74 of 159
REJ03B0091-0200Z
4524 Group
(5) External clock
When the external clock signal is used as the main clock (f(XIN)),
connect the XIN pin to the clock source and leave XOUT pin open.
Then, execute the CMCK instruction (Figure 63).
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using the
ceramic resonator (refer to the recommended operating condition).
Also, note that the power down function (POF or POF2 instruction)
cannot be used when using the external clock.
(6) Sub-clock generating circuit f(XCIN)
The quartz-crystal oscillator can be used for the sub-clock signal
f(XCIN). Connect a quartz-crystal oscillator and this external circuit
to pins XCIN and XCOUT at the shortest distance. A feedback resis-
tor is built in between pins XCIN and XCOUT (Figure 64).
(7) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
Table 24 Clock control register MR
Fig. 63 External clock input circuit
Note : “R” represents read enabled, and “W” represents write enabled.
M34524
XIN
XOUT
External oscillation circuit
VDD
VSS
Execute the CMCK
instruction in program.
*
Fig. 64 External quartz-crystal circuit
M34524
XCIN
XCOUT
Rd
CIN
COUT
MR3
Clock control register MR
Operation mode
Through mode (frequency not divided)
Frequency divided by 2 mode
Frequency divided by 4 mode
Frequency divided by 8 mode
Main clock oscillation enabled
Main clock oscillation stop
Main clock (f(XIN) or f(RING))
Sub-clock (f(XCIN))
at reset : 11002
at power down : state retained
MR3
0
1
R/W
TAMR/
TMRA
Main clock oscillation circuit control bit
System clock selection bit
Operation mode selection bits
0
1
0
1
MR2
0
1
0
1
MR1
MR0
MR2
ROM ORDERING METHOD
1.Mask ROM Order Confirmation Form
2.Mark Specification Form
3.Data to be written to ROM, in EPROM form (three identical cop-
ies) or one floppy disk.
For the mask ROM confirmation and the mark specifications, re-
fer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/en/rom).
Note: Externally connect a damping
resistor Rd depending on the
oscillation frequency.
(A feedback resistor is built-in.)
Use the quartz-crystal manu-
facturer’s recommended value
because constants such as ca-
pacitance depend on the
resonator.
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