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| 型號(hào)： | M34524MC-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 131/163頁(yè) |
| 文件大?。?/td> | 1235K |
| 代理商： | M34524MC-XXXFP |
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Rev.2.00
Jul 27, 2004
page 5 of 159
REJ03B0091-0200Z
4524 Group
PIN DESCRIPTION
Name
Power supply
Ground
CNVSS
Voltage drop
detection circuit
enable
Reset input/output
Main clock input
Sub-clock input
Sub-clock output
Pin
VDD
VSS
CNVSS
VDCE
RESET
XIN
XCIN
XCOUT
Input/Output
—
Input
I/O
Input
Output
Function
Connected to a plus power supply.
Connected to a 0 V power supply.
Connect CNVSS to VSS and apply “L” (0V) to CNVSS certainly.
This pin is used to operate/stop the voltage drop detection circuit. When “H“ level is
input to this pin, the circuit starts operating. When “L“ level is input to this pin, the
circuit stops operating.
An N-channel open-drain I/O pin for a system reset. When the watchdog timer, the
built-in power-on reset or the voltage drop detection circuit causes the system to be
reset, the RESET pin outputs “L” level.
I/O pins of the main clock generating circuit. When using a ceramic resonator, con-
nect it between pins XIN and XOUT. A feedback resistor is built-in between them.
When using the RC oscillation, connect a resistor and a capacitor to XIN, and leave
XOUT pin open.
I/O pins of the sub-clock generating circuit. Connect a 32 kHz quartz-crystal oscillator
between pins XCIN and XCOUT. A feedback resistor is built-in between them.
XOUT
Main clock output
Output
D0–D7
D8, D9
P00–P03
P10–P13
P20–P23
P30–P33
P40–P43
Port C
COM0–
COM3
SEG0–SEG19
VLC3–VLC1
CNTR0,
CNTR1
INT0, INT1
AIN0–AIN7
SCK
SOUT
SIN
I/O port D
Input is examined by
skip decision.
Output port D
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
Output port C
Common output
Segment output
LCD power supply
Timer input/output
Interrupt input
Analog input
Serial I/O data I/O
Serial I/O data output
Serial I/O clock input
I/O
Output
I/O
Output
–
I/O
Input
I/O
Output
Input
Each pin of port D has an independent 1-bit wide I/O function. The output structure
can be switched to N-channel open-drain or CMOS by software. For input use, set
the latch of the specified bit to “1” and select the N-channel open-drain. Ports D4–D7
is also used as SIN, SOUT, SCK and CNTR0 pin.
Each pin of port D has an independent 1-bit wide output function. The output struc-
ture is N-channel open-drain. Ports D8 and D9 are also used as INT0 pin and INT1
pin, respectively.
Port P0 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P0 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Port P1 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain. Port P1 has a key-on wakeup function and
a pull-up function. Both functions can be switched by software.
Port P2 serves as a 4-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
Ports P20–P23 are also used as AIN0–AIN3, respectively.
Port P3 serves as a 4-bit I/O port. The output structure is N-channel open-drain. For
input use, set the latch of the specified bit to “1”.
Ports P30–P33 are also used as AIN4–AIN7, respectively.
Port P4 serves as a 4-bit I/O port. The output structure can be switched to N-channel
open-drain or CMOS by software. For input use, set the latch of the specified bit to
“1” and select the N-channel open-drain.
1-bit output port. The output structure is CMOS. Port C is also used as CNTR1 pin.
LCD common output pins. Pins COM0 and COM1 are used at 1/2 duty, pins COM0–
COM2 are used at 1/3 duty and pins COM0–COM3 are used at 1/4 duty.
LCD segment output pins. SEG0–SEG2 pins are used as VLC3–VLC1 pins, respectively.
LCD power supply pins.
When the internal resistor is used, VDD pin is connected to VLC3 pin (if luminance ad-
justment is required, VDD pin is connected to VLC3 pin through a resistor).
When the external power supply is used, apply the voltage 0
≤ VLC1 ≤ VLC2 ≤ VLC3 ≤ VDD.
VLC3–VLC1 pins are used as SEG0–SEG2 pins, respectively.
CNTR0 pin has the function to input the clock for the timer 1 event counter, and to
output the timer 1 or timer 2 underflow signal divided by 2.
CNTR1 pin has the function to input the clock for the timer 3 event counter, and to
output the PWM signal generated by timer 4.CNTR0 pin and CNTR1 pin are also
used as Ports D7 and C, respectively.
INT0 pin and INT1 pin accept external interrupts. They have the key-on wakeup func-
tion which can be switched by software. INT0 pin and INT1 pin are also used as
Ports D8 and D9, respectively.
A/D converter analog input pins. AIN0–AIN7 are also used as ports P20–P23 and P30–
P33, respectively.
Serial I/O data transfer synchronous clock I/O pin. SCK pin is also used as port D6.
Serial I/O data output pin. SOUT pin is also used as port D5.
Serial I/O data input pin. SIN pin is also used as port D4.
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