參數(shù)資料
型號(hào): M34507M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 61/117頁
文件大小: 937K
代理商: M34507M4-XXXFP
Rev.3.01
2005.02.04
page 46 of 111
REJ03B0107-0301
4507 Group
(5) External clock
When the external signal clock is used as the source oscillation
(f(XIN)), connect the XIN pin to the clock source and leave XOUT pin
open. Then, execute the CMCK instruction (Figure 45).
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using the
ceramic resonator (refer to the recommended operating condition).
Also, note that the RAM back-up mode (POF2 instruction) cannot
be used when using the external clock.
(6) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
Table 19 Clock control register MR
Fig. 45 External clock input circuit
ROM ORDERING METHOD
Please submit the information described below when ordering
Mask ROM.
(1) Mask ROM Order Confirmation Form ..................................... 1
(2) Data to be written into mask ROM ............................... EPROM
(three sets containing the identical data)
(3) Mark Specification Form .......................................................... 1
For the mask ROM confirmation and the mark specifications,
refer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/en/rom).
Note : “R” represents read enabled, and “W” represents write enabled.
MR3
Clock control register MR
System clock
f(XIN) (high-speed mode)
f(XIN)/2 (middle-speed mode)
f(XIN)/4 (low-speed mode)
f(XIN)/8 (default mode)
This bit has no function, but read/write is enabled.
at reset : 11002
at RAM back-up : 11002
MR3
0
1
R/W
Not used
System clock selection bits
0
1
0
1
MR2
0
1
0
1
MR1
MR0
MR2
4507
XIN
XOUT
External oscillation circuit
VDD
VSS
Execute the CMCK
instruction in program.
*
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