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參數(shù)資料
| 型號(hào)： | M34507M4-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| 封裝： | 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 55/117頁 |
| 文件大?。?/td> | 937K |
| 代理商： | M34507M4-XXXFP |
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Rev.3.01
2005.02.04
page 40 of 111
REJ03B0107-0301
4507 Group
(4) Return signal
An external wakeup signal is used to return from the RAM back-up
mode because the oscillation is stopped. Table 16 shows the return
condition for each return source.
(5) Control registers
Key-on wakeup control register K0
Register K0 controls the port P0 key-on wakeup function. Set the
contents of this register through register A with the TK0A instruc-
tion. In addition, the TAK0 instruction can be used to transfer the
contents of register K0 to register A.
Key-on wakeup control register K1
Register K1 controls the port P1 key-on wakeup function. Set the
contents of this register through register A with the TK1A instruc-
tion. In addition, the TAK1 instruction can be used to transfer the
contents of register K0 to register A.
Key-on wakeup control register K2
Register K2 controls the ports P2, D2/C and D3/K key-on wakeup
function. Set the contents of this register through register A with
the TK2A instruction. In addition, the TAK2 instruction can be
used to transfer the contents of register K2 to register A.
Table 16 Return source and return condition
Remarks
The key-on wakeup function can be selected by one port unit. Set the port
using the key-on wakeup function to “H” level before going into the RAM
back-up state.
Select the return level (“L” level or “H” level) with the bit 2 of register I1 ac-
cording to the external state before going into the RAM back-up state.
Return condition
Return by an external “L” level in-
put.
External
wakeup
signal
Return source
Port P0
Port P1 (Note)
Port P2
Ports D2/C, D3/K
Port P13/INT
(Note)
Pull-up control register PU0
Register PU0 controls the ON/OFF of the port P0 pull-up transis-
tor. Set the contents of this register through register A with the
TPU0A instruction.
Pull-up control register PU1
Register PU1 controls the ON/OFF of the port P1 pull-up transis-
tor. Set the contents of this register through register A with the
TPU1A instruction.
Pull-up control register PU2
Register PU2 controls the ON/OFF of the ports P2, D2/C and D3/
K pull-up transistor. Set the contents of this register through reg-
ister A with the TPU2A instruction.
Interrupt control register I1
Register I1 controls the valid waveform of the external 0 inter-
rupt, the input control of INT pin and the return input level. Set
the contents of this register through register A with the TI1A in-
struction. In addition, the TAI1 instruction can be used to transfer
the contents of register I1 to register A.
Return by an external “H” level or
“L” level input. The return level
can be selected with the bit 2
(I12) of register I1.
When the return level is input, the
EXF0 flag is not set.
Note: When the bit 3 (K13) of register K1 is “0”, the key-on wakeup of the INT pin is valid (“H” or “L” level).
It is “1”, the key-on wakeup of port P13 is valid (“L” level).
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