參數(shù)資料
型號(hào)： M24C01-RMB3T/S
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 128 X 8 I2C/2-WIRE SERIAL EEPROM, DSO8
封裝： 2 X 3 MM, MLP-8
文件頁(yè)數(shù)： 33/33頁(yè)
文件大?。?/td> 278K
代理商： M24C01-RMB3T/S
M24C16, M24C08, M24C04, M24C02, M24C01
Signal description
2.4
Supply voltage (VCC)
2.4.1
Operating supply voltage VCC
Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage
within the specified [VCC(min), VCC(max)] range must be applied (see Table 6 and Table 7).
In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line
with a suitable capacitor (usually of the order of 10nF to 100nF) close to the VCC/VSS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (tW).
The VCC rise time must not vary faster than 1V/s
2.4.2
Power-up and device Reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of VCC), the device does not respond to any
instruction until VCC has reached the Power On Reset threshold voltage (this threshold is
lower than the minimum VCC operating voltage defined in Table 6 and Table 7).
When VCC has passed the POR threshold, the device is reset and in Standby Power mode.
2.4.3
Power-down
At Power-down (where VCC decreases continuously), as soon as VCC drops from the
operating voltage range to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in the Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
Maximum RP value versus bus parasitic capacitance (C) for an IC bus
AI01665b
VCC
C
SDA
RP
MASTER
RP
SCL
C
100
0
4
8
12
16
20
C (pF)
Maximum
RP
value
(k
)
10
1000
fc = 400kHz
fc = 100kHz
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