參數(shù)資料
型號(hào)： M24C01-RMB3T/S
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 128 X 8 I2C/2-WIRE SERIAL EEPROM, DSO8
封裝： 2 X 3 MM, MLP-8
文件頁(yè)數(shù)： 32/33頁(yè)
文件大小： 278K
代理商： M24C01-RMB3T/S
Signal description
M24C16, M24C08, M24C04, M24C02, M24C01
2
Signal description
2.1
Serial Clock (SCL)
This input signal is used to strobe all data in and out of the device. In applications where this
signal is used by slave devices to synchronize the bus to a slower clock, the bus master
must have an open drain output, and a pull-up resistor can be connected from Serial Clock
(SCL) to VCC. (Figure 4 indicates how the value of the pull-up resistor can be calculated). In
most applications, though, this method of synchronization is not employed, and so the pull-
up resistor is not necessary, provided that the bus master has a push-pull (rather than open
drain) output.
2.2
Serial Data (SDA)
This bi-directional signal is used to transfer data in or out of the device. It is an open drain
output that may be wire-OR’ed with other open drain or open collector signals on the bus. A
pull up resistor must be connected from Serial Data (SDA) to VCC. (Figure 4 indicates how
the value of the pull-up resistor can be calculated).
2.3
Chip Enable (E0, E1, E2)
These input signals are used to set the value that is to be looked for on the three least
significant bits (b3, b2, b1) of the 7-bit Device Select Code. These inputs must be tied to
VCC or VSS, to establish the Device Select Code as shown in Figure 3.
Figure 3.
Device select code
2.3.1
Write Control (WC)
This input signal is useful for protecting the entire contents of the memory from inadvertent
write operations. Write operations are disabled to the entire memory array when Write
Control (WC) is driven High. When unconnected, the signal is internally read as VIL, and
Write operations are allowed.
When Write Control (WC) is driven High, Device Select and Address bytes are
acknowledged, Data bytes are not acknowledged.
Ai11650
VCC
M24Cxx
VSS
Ei
VCC
M24Cxx
VSS
Ei
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