參數(shù)資料
型號(hào): LV24010LP
元件分類: 調(diào)諧器
英文描述: 1-BAND, AUDIO TUNER, QCC40
封裝: 5 X 5 MM, VQLP-40
文件頁(yè)數(shù): 11/18頁(yè)
文件大?。?/td> 445K
代理商: LV24010LP
LV24010LP
No.A0466-2/18
Electrical Characteristics at Ta = 25°C, VCC = 3.0V, VDD = 3.0V, in the measuring circuit specified, Soft
Mute/Stereo = off
Ratings
Parameter
Symbol
Conditions
min
typ
max
unit
ICCA
Measurement at pin 23 with 60 dB
input in the
analog block, Monaural input
15
19
mA
Current drain
(in operation)
ICCD
Measurement at pins 27 and 40 with 60 dB
input in
the digital block
0.2
0.4
0.8
mA
ICCA
Measurement at pin 23 in the standby mode of the
analog block
3
30
A
Current drain
(in standby)
ICCD
Measurement at pins 27 and 40 in the standby
mode of the digital block.
3
30
A
FM receive band
F_range
76
108
MHz
FM receive characteristics;MONO:
fc = 80MHz,fm = 1kHz, 22.5kHzdev. Note that Soft_stereo,Soft_and mute functions are OFF.
3dB sensitivity
-3dB LS
60dB
V, 22.5kHzdev output standard,
-3dB input -3dB.
13
20
dB
V
EMF
Practical sensitivity 1
QS1
Input level with S/N = 30dB,
Deemphasis = 75
s SG open display
10
17
dB
V
EMF
Practical sensitivity 2
(Reference)
QS2
Input level with S/N = 26dB,
Deemphasis = 75
s, SG terminal display
1.25
V
Demodulation output
Vo
60dB
V, pin 11 output
50
70
110
mV
Channel balance
CB
60dB
V, pin 11 output / pin 12 output
-2
0
2
dB
Signal-to-noise ratio
S/N
60dB
V, pin 11 output
48
58
dB
Total harmonic distortion
1(MONO)
THD1
60dB
V, pin 11 output, 22.5kHdev
0.4
1.5
%
Total harmonic distortion
2(MONO)
THD2
60dB
V, pin 11 output, 75kHdev
1.3
3
%
Field intensity display level
FS
Input level at which FS1 changes to FS2
6
16
26
dB
Mute attenuation
Mute-Att
60dB
V, pin 11 output
60
70
dB
FM receive characteristics; STEREO:
fc = 80MHz, fm = 1kHz, VIN = 60dBV, L+R = 30% (22.5kHz), Pilot = 10% (7.5kHzdev)
Separation
SEP
L-mod, pin 11 output / pin 12 output
20
35
dB
Total harmonic distortion
(Main)
THD-ST
Main-mod (for L+R input), pin 11 / pin 12 output,
IHF_BPF
0.6
1.8
%
RDS characteristics
RDS_center frequency
fcen
Adjustment accuracy of RDS_VCO DAC value.
(Adjustment accuracy of free_run frequency)
56.5
57.0
57.5
kHz
-3dB bandwidth
BW-3dB
Bandwidth of BPF to 57KHZ Center frequency. Set
Block4 register 06h of Bit3-2 (RDSBW) to “11”
( ) is not guarantee value. Just for Reference value
(3.0)
5.5
(7.0)
kHz
RDS Current drain
Irds
RDS current value at RDS Enable/Disable
2
4
mA
The output level is set to the VOL = 14 when the block 2, register 09h of control register map has the bit 3,2,1,0 = “0010”
In other cases:
The IF_OSC frequency must be adjust to 140kHz with DAC of block 1, register 05h.
The IF_CENTER set bit value (block 2, register 03h) applies to same DAC value of IF_OSC.
The IF_BW set bit value (block2, register 05h) applies to the setting of the value 65% of the IF_OSC set bit value.
The RDS_OSC frequency must be adjust to 114kHz with DAC of block 4, register 07h.
The RDS_FLTDAC (block 4, register 03h) set bit value applies to the setting of value 95% of RDS_OSC set bit value.
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