參數(shù)資料
型號(hào)： LFXP2-17E-7F484C
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
中文描述： FPGA, 420 MHz, PBGA484
封裝： 23 X 23 MM, FPBGA-484
文件頁(yè)數(shù)： 12/92頁(yè)
文件大?。?/td> 1701K
代理商： LFXP2-17E-7F484C
www.latticesemi.com
1-1
DS1009 Introduction_01.2
February 2008
Data Sheet DS1009
2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Features
flexiFLASH Architecture
Instant-on
Infinitely reconfigurable
Single chip
FlashBAK technology
Serial TAG memory
Design security
Live Update Technology
TransFR technology
Secure updates with 128 bit AES encryption
Dual-boot with external SPI
sysDSP Block
Three to eight blocks for high performance
Multiply and Accumulate
12 to 32 18x18 multipliers
Each block supports one 36x36 multiplier or four
18x18 or eight 9x9 multipliers
Embedded and Distributed Memory
Up to 885 Kbits sysMEM EBR
Up to 83 Kbits Distributed RAM
sysCLOCK PLLs
Up to four analog PLLs per device
Clock multiply, divide and phase shifting
Flexible I/O Buffer
sysIO buffer supports:
– LVCMOS 33/25/18/15/12; LVTTL
– SSTL 33/25/18 class I, II
– HSTL15 class I; HSTL18 class I, II
–PCI
– LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS
Pre-engineered Source Synchronous
Interfaces
DDR / DDR2 interfaces up to 200 MHz
7:1 LVDS interfaces support display applications
XGMII
Density And Package Options
5k to 40k LUT4s, 86 to 540 I/Os
csBGA, TQFP, PQFP, ftBGA and fpBGA packages
Density migration supported
Flexible Device Configuration
SPI (master and slave) Boot Flash Interface
Dual Boot Image supported
Soft Error Detect (SED) macro embedded
System Level Support
IEEE 1149.1 and IEEE 1532 Compliant
On-chip oscillator for initialization & general use
Devices operate with 1.2V power supply
Table 1-1. LatticeXP2 Family Selection Guide
Device
XP2-5
XP2-8
XP2-17
XP2-30
XP2-40
LUTs (K)
5
8
172940
Distributed RAM (KBits)
1018355683
EBR SRAM (KBits)
166
221
276
387
885
EBR SRAM Blocks
9
12
15
21
48
sysDSP Blocks
3
4
5
7
8
18 x 18 Multipliers
1216202832
VCC Voltage
1.2
GPLL
22
444
Max Available I/O
172
201
358
472
540
Packages and I/O Combinations
132-Ball csBGA (8 x 8 mm)
86
144-Pin TQFP (20 x 20 mm)
100
208-Pin PQFP (28 x 28 mm)
146
256-Ball ftBGA (17 x17 mm)
172
201
484-Ball fpBGA (23 x 23 mm)
358
363
672-Ball fpBGA (27 x 27 mm)
472
540
LatticeXP2 Family Data Sheet
Introduction
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LFXP2-17E-7F484C8W 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 17KLUTs 358I/O Inst- on DSP 1.2V -7Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP2-17E-7FN484C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 17KLUTs 358 I/O Inst -on DSP 1.2V -6 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP2-17E-7FN484C8W 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 17KLUTs 358I/O Inst -on DSP 1.2V -7 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP2-17E-7FT256C 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 17KLUTs 201 I/O Inst -on DSP 1.2V -7 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
LFXP2-17E-7FT256C8W 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 17KLUTs 201 I/O Inst -on DSP 1.2V -7 Spd RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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