參數(shù)資料
型號(hào): LC72144M
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24
封裝: MFP-24
文件頁數(shù): 20/22頁
文件大?。?/td> 307K
代理商: LC72144M
Continued from preceding page.
No. 5377-7/22
LC72144M
Pin No.
Symbol
Type
Function
Pin circuit
7
6
21
18
20
11
10
22
ADC0
ADC1
PD0
PD1
PDS
HCTR/I-6
LCTR/I-7
XBUF
A/D converter input
Main charge pump output
Sub-charge pump output
General-purpose counter
Xtal oscillator buffer
A/D converter inputs
6-bit successive-approximation A/D converter
See the item on the structure of the A/D converter for details.
PLL charge pump output
A high level is output from the PD0 pin when the frequency
created by dividing the local oscillator frequency by N is higher
than the reference frequency. A low level is output when the
frequency is lower. The pin goes to the high-impedance state
when the frequencies agree.
The PD1 pin operates in the same manner.
A high-speed lockup circuit can be formed by using this pin in
combination with the main charge pump.
See the item on the structure of the charge pump for details.
HCTR is selected when the CTS1 bit in the serial data is set to 1.
The input frequency range is 0.4 to 25 MHz.
The signal passes through a divide-by-2 circuit and then is
input to a general-purpose counter. An integrating count can
also be performed.
The result of the count is output from the MSB of the general-
purpose counter through the DO output pin.
See the item on the structure of the general-purpose counter
for details.
When the serial data H/I-6 bit is set to 0:
This pin functions as an input port, and its state is output from
the DO output pin.
LCTR is selected when the CTS1 bit in the serial data is set to 0.
When the CTS0 bit in the serial data is set to 1:
The circuit switches to frequency measurement mode.
The input frequency range is 10 to 500 kHz.
The signal is input directly to the general-purpose counter
without passing through the divide-by-2 counter.
The result of the count is output from the MSB of the general-
purpose counter through the DO output pin.
When the CTS0 bit in the serial data is set to 0:
The circuit switches to period measurement mode.
The input frequency range is 4 Hz to 20 kHz.
The measurement period can be set to be 1 or 2 periods.
The result of the count is output from the MSB of the general-
purpose counter through the DO output pin.
See the item on the structure of the general-purpose counter
for details.
When the L/I-7 bit in the serial data is set to 0.
This pin functions as an input port, and its state is output from
the DO output pin.
Output buffer for the crystal oscillator circuit.
If the XB bit in the serial data is set to 1, the output buffer
operates and the crystal oscillator signal (a pulse waveform) is
output.
If XB is 0, this pin outputs a low level. (Since XB is set to 0 after
the power on reset, the output will be fixed at the low level.)
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