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參數(shù)資料
| 型號(hào)： | KFM4GH6Q4M-DEB80 |
| 元件分類： | PROM |
| 英文描述： | 256M X 16 FLASH 1.8V PROM, 70 ns, PBGA63 |
| 封裝： | 10 X 13 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, FBGA-63 |
| 文件頁(yè)數(shù)： | 38/142頁(yè) |
| 文件大?。?/td> | 2226K |
| 代理商： | KFM4GH6Q4M-DEB80 |
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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
- 132 -
FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
7.0 TECHNICAL AND APPLICATION NOTES
From time-to-time supplemental technical information and application notes pertaining to the design and operation of the device in a system
are included in this section. Contact your Samsung Representative to determine if additional notes are available.
7.1 Methods of Determining Interrupt Status
There are two methods of determining Interrupt Status on the Flex-MuxOneNAND. Using the INT pin or monitoring the Interrupt Status Regis-
ter Bit.
The Flex-MuxOneNAND INT pin is an output pin function used to notify the Host when a command has been completed. This provides a hard-
ware method of signaling the completion of a program, erase, or load operation.
In its normal state, the INT pin is high if the INT polarity bit is default. In case of normal INT mode, before a command is written to the com-
mand register, the INT bit must be written to ‘0’ for the INT pin transitions to a low state indicating start of the operation. In case of ‘INT auto
mode’, INT bit is written to ‘0’ automatically right after command issued. Upon completion of the command operation by the Flex-Mux-
OneNAND’s internal controller, INT returns to a high state.
INT pin is a DQ-type output except ‘Reset’ and ‘Interleave Cache program’ in DDP allowing two INT outputs to be Or-tied together. In case of
‘Reset’ and ‘Interleave Cache Program’ in DDP, INT pin operates as an open drain with 50K ohm. INT is an INT does not float to a hi-Z condi-
tion when CE is disabled or OE is disabled. Refer to section 2.8 for additional information about INT.
INT can be implemented by tying INT to a host GPIO or by continuous polling of the Interrupt status register.
INT Type (Mono)
INT Type (DDP)
General Operation
DQ type
Reset Operation (Cold,Warm,Hot and Flash Core Reset) and
final command of Interleave cache program
DQ type
Open drain (with 50K ohm)
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