- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299258 > KFM4GH6Q4M-DEB80 256M X 16 FLASH 1.8V PROM, 70 ns, PBGA63 PDF資料下載
參數(shù)資料
| 型號： | KFM4GH6Q4M-DEB80 |
| 元件分類： | PROM |
| 英文描述： | 256M X 16 FLASH 1.8V PROM, 70 ns, PBGA63 |
| 封裝： | 10 X 13 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, FBGA-63 |
| 文件頁數(shù)： | 109/142頁 |
| 文件大小： | 2226K |
| 代理商： | KFM4GH6Q4M-DEB80 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁當(dāng)前第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁
Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
- 69 -
FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
3.7.2.1 Continuous Linear Burst Read Operation
See Timing Diagram 6.2
First Clock Cycle
The initial word is output at tIAA after the rising edge of the first CLK cycle. The RDY output indicates the initial word is ready to the system by
pulsing high. If the device is accessed synchronously while it is set to Asynchronous Read Mode, the first data can still be read out.
Subsequent Clock Cycles
Subsequent words are output (Burst Access Time from Valid Clock to Output) tBA after the rising edge of each successive clock cycle, which
automatically increments the internal address counter.
Terminating Burst Read
The device will continue to output sequential burst data until the system asserts CE high, or RP low, wrapping around until it reaches the des-
ignated address (see section 2.7.3 for address map information). Alternately, a Cold/Warm/Hot Reset, or a WE low pulse will terminate the
burst read operation.
Synchronous Read Boundary
* Reserved area is not available on Synchronous read
NOTE :
Continuous burst read should be done, with in the address range of the selected buffer RAM, dataRAM0 or DataRAM1.
3.7.2.2 4-, 8-, 16-, 32-Word Linear Burst Read Operation
See Timing Diagram 6.1
An alternate Burst Read Mode enables a fixed number of words to be read from consecutive address.
The device supports a burst read from consecutive addresses of 4-, 8-, 16-, and 32-words with a linear-wrap around. When the last word in
the burst has been reached, assert CE and OE high to terminate the operation.
In this mode, the start address for the burst read can be any address of the address map with one exception. The device does not support a
32-word linear burst read on the spare area of the BufferRAM.
Division
Add.map(word order)
BootRAM Main(0.5KW)
0000h~01FFh
BufferRAM0 Main(1KW)
0200h~05FFh
BufferRAM1 Main(1KW)
0600h~09FFh
Reserved Main*
0A00h~7FFFh
BootRAM Spare(16W)
8000H~800Fh
BufferRAM0 Spare(32W)
8010h~802Fh
BufferRAM1 Spare(32W)
8030h~804Fh
Reserved Spare*
8050h~8FFFh
Reserved Register*
9000h~EFFFh
Register(4KW)
F000h~FFFFh
Not Supported
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KHP7 | 2.75 A, 7000 V, SILICON, RECTIFIER DIODE |
| KJA1Y13K8PC | 8 CONTACT(S), STEEL, MALE, MIL SERIES CONNECTOR, SOLDER, RECEPTACLE |
| KJA1Y13K8PD | 8 CONTACT(S), STEEL, MALE, MIL SERIES CONNECTOR, SOLDER, RECEPTACLE |
| KJA1Y13K8PE | 8 CONTACT(S), STEEL, MALE, MIL SERIES CONNECTOR, SOLDER, RECEPTACLE |
| KJA1Y13K8PN | 8 CONTACT(S), STEEL, MALE, MIL SERIES CONNECTOR, SOLDER, RECEPTACLE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KFM65MZ-160PR | 制造商:TYAN 功能描述:CHASSIS UNIT - Bulk |
| KFM85M | 制造商:KEC 制造商全稱:KEC(Korea Electronics) 功能描述:SPECIFICATIONS FOR SAW FILTER(BAND PASS FILTERS FOR CDMA IF STAGE) |
| KFM90D060 | 制造商:IDEC CORPORATION 功能描述:CONNECTOR M12 |
| KFM90D060R | 制造商:IDEC CORPORATION 功能描述:CONNECTOR M12 |
| KFM90D150 | 制造商:IDEC CORPORATION 功能描述:CONNECTOR M12 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。